#define ELPA_C_2STAGE_REAL_GENERIC 1 #define ELPA_C_2STAGE_REAL_GENERIC_SIMPLE 2 #define ELPA_C_2STAGE_REAL_BGP 3 #define ELPA_C_2STAGE_REAL_BGQ 4 #define ELPA_C_2STAGE_REAL_SSE 5 #define ELPA_C_2STAGE_REAL_SSE_BLOCK2 6 #define ELPA_C_2STAGE_REAL_SSE_BLOCK4 7 #define ELPA_C_2STAGE_REAL_SSE_BLOCK6 8 #define ELPA_C_2STAGE_REAL_AVX_BLOCK2 9 #define ELPA_C_2STAGE_REAL_AVX_BLOCK4 10 #define ELPA_C_2STAGE_REAL_AVX_BLOCK6 11 #define ELPA_C_2STAGE_REAL_AVX2_BLOCK2 12 #define ELPA_C_2STAGE_REAL_AVX2_BLOCK4 13 #define ELPA_C_2STAGE_REAL_AVX2_BLOCK6 14 #define ELPA_C_2STAGE_REAL_AVX512_BLOCK2 15 #define ELPA_C_2STAGE_REAL_AVX512_BLOCK4 16 #define ELPA_C_2STAGE_REAL_AVX512_BLOCK6 17 #define ELPA_C_2STAGE_REAL_GPU 18 #define ELPA_C_2STAGE_NUMBER_OF_REAL_KERNELS 18 #define ELPA_C_2STAGE_COMPLEX_GENERIC 1 #define ELPA_C_2STAGE_COMPLEX_GENERIC_SIMPLE 2 #define ELPA_C_2STAGE_COMPLEX_BGP 3 #define ELPA_C_2STAGE_COMPLEX_BGQ 4 #define ELPA_C_2STAGE_COMPLEX_SSE 5 #define ELPA_C_2STAGE_COMPLEX_SSE_BLOCK1 6 #define ELPA_C_2STAGE_COMPLEX_SSE_BLOCK2 7 #define ELPA_C_2STAGE_COMPLEX_AVX_BLOCK1 8 #define ELPA_C_2STAGE_COMPLEX_AVX_BLOCK2 9 #define ELPA_C_2STAGE_COMPLEX_AVX2_BLOCK1 10 #define ELPA_C_2STAGE_COMPLEX_AVX2_BLOCK2 11 #define ELPA_C_2STAGE_COMPLEX_AVX512_BLOCK1 12 #define ELPA_C_2STAGE_COMPLEX_AVX512_BLOCK2 13 #define ELPA_C_2STAGE_COMPLEX_GPU 14 #define ELPA_C_2STAGE_NUMBER_OF_COMPLEX_KERNELS 14 #if defined(WITH_REAL_AVX_BLOCK2_KERNEL) #ifndef WITH_ONE_SPECIFIC_REAL_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_GENERIC #else /* WITH_ONE_SPECIFIC_REAL_KERNEL */ #ifdef WITH_REAL_GENERIC_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_GENERIC #endif #ifdef WITH_REAL_GENERIC_SIMPLE_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_GENERIC_SIMPLE #endif #ifdef WITH_REAL_SSE_ASSEMBLY_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_SSE #endif #if defined(WITH_REAL_SSE_BLOCK2_KERNEL) || defined(WITH_REAL_SSE_BLOCK4_KERNEL) || defined(WITH_REAL_SSE_BLOCK6_KERNEL) #ifdef WITH_REAL_SSE_BLOCK6_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_SSE_BLOCK6 #else #ifdef WITH_REAL_SSE_BLOCK4_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_SSE_BLOCK4 #else #ifdef WITH_REAL_SSE_BLOCK2_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_SSE_BLOCK2 #endif #endif #endif #endif /* #if defined(WITH_REAL_SSE_BLOCK2_KERNEL) || defined(WITH_REAL_SSE_BLOCK4_KERNEL) || defined(WITH_REAL_SSE_BLOCK6_KERNEL) */ #if defined(WITH_REAL_AVX_BLOCK2_KERNEL) || defined(WITH_REAL_AVX_BLOCK4_KERNEL) || defined(WITH_REAL_AVX_BLOCK6_KERNEL) #ifdef WITH_REAL_AVX_BLOCK6_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX_BLOCK6 #else #ifdef WITH_REAL_AVX_BLOCK4_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX_BLOCK4 #else #ifdef WITH_REAL_AVX_BLOCK2_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX_BLOCK2 #endif #endif #endif #endif /* #if defined(WITH_REAL_AVX_BLOCK2_KERNEL) || defined(WITH_REAL_AVX_BLOCK4_KERNEL) || defined(WITH_REAL_AVX_BLOCK6_KERNEL) */ #if defined(WITH_REAL_AVX2_BLOCK2_KERNEL) || defined(WITH_REAL_AVX2_BLOCK4_KERNEL) || defined(WITH_REAL_AVX2_BLOCK6_KERNEL) #ifdef WITH_REAL_AVX2_BLOCK6_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX2_BLOCK6 #else #ifdef WITH_REAL_AVX2_BLOCK4_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX2_BLOCK4 #else #ifdef WITH_REAL_AVX2_BLOCK2_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX2_BLOCK2 #endif #endif #endif #endif /* #if defined(WITH_REAL_AVX2_BLOCK2_KERNEL) || defined(WITH_REAL_AVX2_BLOCK4_KERNEL) || defined(WITH_REAL_AVX2_BLOCK6_KERNEL) */ #if defined(WITH_REAL_AVX512_BLOCK2_KERNEL) || defined(WITH_REAL_AVX512_BLOCK4_KERNEL) || defined(WITH_REAL_AVX512_BLOCK6_KERNEL) #ifdef WITH_REAL_AVX512_BLOCK6_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX512_BLOCK6 #else #ifdef WITH_REAL_AVX512_BLOCK4_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX512_BLOCK4 #else #ifdef WITH_REAL_AVX512_BLOCK2_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX512_BLOCK2 #endif #endif #endif #endif /* #if defined(WITH_REAL_AVX512_BLOCK2_KERNEL) || defined(WITH_REAL_AVX512_BLOCK4_KERNEL) || defined(WITH_REAL_AVX512_BLOCK6_KERNEL) */ #ifdef WITH_REAL_BGP_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX_BGP #endif #ifdef WITH_REAL_BGQ_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX_BGQ #endif #ifdef WITH_GPU_VERSION #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_GPU #endif #endif /* WITH_ONE_SPECIFIC_REAL_KERNEL */ #else /* WITH_REAL_AVX_BLOCK2_KERNEL */ #ifndef WITH_ONE_SPECIFIC_REAL_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_GENERIC #else /* WITH_ONE_SPECIFIC_REAL_KERNEL */ #ifdef WITH_REAL_GENERIC_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_GENERIC #endif #ifdef WITH_REAL_GENERIC_SIMPLE_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_GENERIC_SIMPLE #endif #ifdef WITH_REAL_SSE_ASSEMBLY_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_SSE #endif #if defined(WITH_REAL_SSE_BLOCK2_KERNEL) || defined(WITH_REAL_SSE_BLOCK4_KERNEL) || defined(WITH_REAL_SSE_BLOCK6_KERNEL) #ifdef WITH_REAL_SSE_BLOCK6_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_SSE_BLOCK6 #else #ifdef WITH_REAL_SSE_BLOCK4_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_SSE_BLOCK4 #else #ifdef WITH_REAL_SSE_BLOCK2_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_SSE_BLOCK2 #endif #endif #endif #endif /* #if defined(WITH_REAL_SSE_BLOCK2_KERNEL) || defined(WITH_REAL_SSE_BLOCK4_KERNEL) || defined(WITH_REAL_SSE_BLOCK6_KERNEL) */ #if defined(WITH_REAL_AVX_BLOCK2_KERNEL) || defined(WITH_REAL_AVX_BLOCK4_KERNEL) || defined(WITH_REAL_AVX_BLOCK6_KERNEL) #ifdef WITH_REAL_AVX_BLOCK6_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX_BLOCK6 #else #ifdef WITH_REAL_AVX_BLOCK4_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX_BLOCK4 #else #ifdef WITH_REAL_AVX_BLOCK2_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX_BLOCK2 #endif #endif #endif #endif /* #if defined(WITH_REAL_AVX_BLOCK2_KERNEL) || defined(WITH_REAL_AVX_BLOCK4_KERNEL) || defined(WITH_REAL_AVX_BLOCK6_KERNEL) */ #if defined(WITH_REAL_AVX2_BLOCK2_KERNEL) || defined(WITH_REAL_AVX2_BLOCK4_KERNEL) || defined(WITH_REAL_AVX2_BLOCK6_KERNEL) #ifdef WITH_REAL_AVX2_BLOCK6_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX2_BLOCK6 #else #ifdef WITH_REAL_AVX2_BLOCK4_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX2_BLOCK4 #else #ifdef WITH_REAL_AVX2_BLOCK2_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX2_BLOCK2 #endif #endif #endif #endif /* #if defined(WITH_REAL_AVX2_BLOCK2_KERNEL) || defined(WITH_REAL_AVX2_BLOCK4_KERNEL) || defined(WITH_REAL_AVX2_BLOCK6_KERNEL) */ #if defined(WITH_REAL_AVX512_BLOCK2_KERNEL) || defined(WITH_REAL_AVX512_BLOCK4_KERNEL) || defined(WITH_REAL_AVX512_BLOCK6_KERNEL) #ifdef WITH_REAL_AVX512_BLOCK6_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX512_BLOCK6 #else #ifdef WITH_REAL_AVX512_BLOCK4_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX512_BLOCK4 #else #ifdef WITH_REAL_AVX512_BLOCK2_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX512_BLOCK2 #endif #endif #endif #endif /* #if defined(WITH_REAL_AVX512_BLOCK2_KERNEL) || defined(WITH_REAL_AVX512_BLOCK4_KERNEL) || defined(WITH_REAL_AVX512_BLOCK6_KERNEL) */ #ifdef WITH_REAL_BGP_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX_BGP #endif #ifdef WITH_REAL_BGQ_KERNEL #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_AVX_BGQ #endif #ifdef WITH_GPU_VERSION #define ELPA_C_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_GPU #endif #endif /* WITH_ONE_SPECIFIC_REAL_KERNEL */ #endif /* WITH_REAL_AVX_BLOCK2_KERNEL */ #if defined(WITH_COMPLEX_AVX_BLOCK1_KERNEL) #ifndef WITH_ONE_SPECIFIC_COMPLEX_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_GENERIC #else /* WITH_ONE_SPECIFIC_COMPLEX_KERNEL */ #ifdef WITH_COMPLEX_GENERIC_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_GENERIC #endif #ifdef WITH_COMPLEX_GENERIC_SIMPLE_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_GENERIC_SIMPLE #endif #ifdef WITH_COMPLEX_SSE_ASSEMBLY_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_SSE #endif #if defined(WITH_COMPLEX_SSE_BLOCK1_KERNEL) || defined(WITH_COMPLEX_SSE_BLOCK2_KERNEL) #ifdef WITH_COMPLEX_SSE_BLOCK2_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_SSE_BLOCK2 #else #ifdef WITH_COMPLEX_SSE_BLOCK1_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_SSE_BLOCK1 #endif #endif #endif /* defined(WITH_COMPLEXL_SSE_BLOCK1_KERNEL) || defined(WITH_COMPLEX_SSE_BLOCK2_KERNEL) */ #if defined(WITH_COMPLEX_AVX_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX_BLOCK2_KERNEL) #ifdef WITH_COMPLEX_AVX_BLOCK2_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX_BLOCK2 #else #ifdef WITH_COMPLEX_AVX_BLOCK1_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX_BLOCK1 #endif #endif #endif /* defined(WITH_COMPLEX_AVX_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX_BLOCK2_KERNEL) */ #if defined(WITH_COMPLEX_AVX2_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX2_BLOCK2_KERNEL) #ifdef WITH_COMPLEX_AVX2_BLOCK2_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX2_BLOCK2 #else #ifdef WITH_COMPLEX_AVX2_BLOCK1_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX2_BLOCK1 #endif #endif #endif /* defined(WITH_COMPLEX_AVX2_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX2_BLOCK2_KERNEL) */ #if defined(WITH_COMPLEX_AVX512_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX512_BLOCK2_KERNEL) #ifdef WITH_COMPLEX_AVX512_BLOCK2_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX512_BLOCK2 #else #ifdef WITH_COMPLEX_AVX512_BLOCK1_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX512_BLOCK1 #endif #endif #endif /* defined(WITH_COMPLEX_AVX512_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX512_BLOCK2_KERNEL) */ #ifdef WITH_GPU_VERSION #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_GPU #endif #endif /* WITH_ONE_SPECIFIC_COMPLEX_KERNEL */ #else /* WITH_COMPLEX_AVX_BLOCK1_KERNEL */ #ifndef WITH_ONE_SPECIFIC_COMPLEX_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_GENERIC #else /* WITH_ONE_SPECIFIC_COMPLEX_KERNEL */ #ifdef WITH_COMPLEX_GENERIC_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_GENERIC #endif #ifdef WITH_COMPLEX_GENERIC_SIMPLE_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_GENERIC_SIMPLE #endif #ifdef WITH_COMPLEX_SSE_ASSEMBLY_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_SSE #endif #if defined(WITH_COMPLEX_SSE_BLOCK1_KERNEL) || defined(WITH_COMPLEX_SSE_BLOCK2_KERNEL) #ifdef WITH_COMPLEX_SSE_BLOCK2_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_SSE_BLOCK2 #else #ifdef WITH_COMPLEX_SSE_BLOCK1_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_SSE_BLOCK1 #endif #endif #endif /* defined(WITH_COMPLEXL_SSE_BLOCK1_KERNEL) || defined(WITH_COMPLEX_SSE_BLOCK2_KERNEL) */ #if defined(WITH_COMPLEX_AVX_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX_BLOCK2_KERNEL) #ifdef WITH_COMPLEX_AVX_BLOCK2_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX_BLOCK2 #else #ifdef WITH_COMPLEX_AVX_BLOCK1_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX_BLOCK1 #endif #endif #endif /* defined(WITH_COMPLEX_AVX_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX_BLOCK2_KERNEL) */ #if defined(WITH_COMPLEX_AVX2_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX2_BLOCK2_KERNEL) #ifdef WITH_COMPLEX_AVX2_BLOCK2_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX2_BLOCK2 #else #ifdef WITH_COMPLEX_AVX2_BLOCK1_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX2_BLOCK1 #endif #endif #endif /* defined(WITH_COMPLEX_AVX2_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX2_BLOCK2_KERNEL) */ #if defined(WITH_COMPLEX_AVX512_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX512_BLOCK2_KERNEL) #ifdef WITH_COMPLEX_AVX512_BLOCK2_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX512_BLOCK2 #else #ifdef WITH_COMPLEX_AVX512_BLOCK1_KERNEL #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_AVX512_BLOCK1 #endif #endif #endif /* defined(WITH_COMPLEX_AVX512_BLOCK1_KERNEL) || defined(WITH_COMPLEX_AVX512_BLOCK2_KERNEL) */ #ifdef WITH_GPU_VERSION #define ELPA_C_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_GPU #endif #endif /* WITH_ONE_SPECIFIC_COMPLEX_KERNEL */ #endif /* WITH_COMPLEX_AVX_BLOCK1_KERNEL */ #ifdef ELPA_H #define ELPA_2STAGE_REAL_GENERIC ELPA_C_2STAGE_REAL_GENERIC #define ELPA_2STAGE_REAL_GENERIC_SIMPLE ELPA_C_2STAGE_REAL_GENERIC_SIMPLE #define ELPA_2STAGE_REAL_BGP ELPA_C_2STAGE_REAL_BGP #define ELPA_2STAGE_REAL_BGQ ELPA_C_2STAGE_REAL_BGQ #define ELPA_2STAGE_REAL_SSE ELPA_C_2STAGE_REAL_SSE #define ELPA_2STAGE_REAL_SSE_BLOCK2 ELPA_C_2STAGE_REAL_SSE_BLOCK2 #define ELPA_2STAGE_REAL_SSE_BLOCK4 ELPA_C_2STAGE_REAL_SSE_BLOCK4 #define ELPA_2STAGE_REAL_SSE_BLOCK6 ELPA_C_2STAGE_REAL_SSE_BLOCK6 #define ELPA_2STAGE_REAL_AVX_BLOCK2 ELPA_C_2STAGE_REAL_AVX_BLOCK2 #define ELPA_2STAGE_REAL_AVX_BLOCK4 ELPA_C_2STAGE_REAL_AVX_BLOCK4 #define ELPA_2STAGE_REAL_AVX_BLOCK6 ELPA_C_2STAGE_REAL_AVX_BLOCK6 #define ELPA_2STAGE_REAL_AVX2_BLOCK2 ELPA_C_2STAGE_REAL_AVX2_BLOCK2 #define ELPA_2STAGE_REAL_AVX2_BLOCK4 ELPA_C_2STAGE_REAL_AVX2_BLOCK4 #define ELPA_2STAGE_REAL_AVX2_BLOCK6 ELPA_C_2STAGE_REAL_AVX2_BLOCK6 #define ELPA_2STAGE_REAL_AVX512_BLOCK2 ELPA_C_2STAGE_REAL_AVX512_BLOCK2 #define ELPA_2STAGE_REAL_AVX512_BLOCK4 ELPA_C_2STAGE_REAL_AVX512_BLOCK4 #define ELPA_2STAGE_REAL_AVX512_BLOCK6 ELPA_C_2STAGE_REAL_AVX512_BLOCK6 #define ELPA_2STAGE_REAL_GPU ELPA_C_2STAGE_REAL_GPU #define ELPA_2STAGE_REAL_DEFAULT ELPA_C_2STAGE_REAL_DEFAULT #define ELPA_2STAGE_NUMBER_OF_REAL_KERNELS ELPA_C_2STAGE_NUMBER_OF_REAL_KERNELS #define ELPA_2STAGE_COMPLEX_GENERIC ELPA_C_2STAGE_COMPLEX_GENERIC #define ELPA_2STAGE_COMPLEX_GENERIC_SIMPLE ELPA_C_2STAGE_COMPLEX_GENERIC_SIMPLE #define ELPA_2STAGE_COMPLEX_BGP ELPA_C_2STAGE_COMPLEX_BGP #define ELPA_2STAGE_COMPLEX_BGQ ELPA_C_2STAGE_COMPLEX_BGQ #define ELPA_2STAGE_COMPLEX_SSE ELPA_C_2STAGE_COMPLEX_SSE #define ELPA_2STAGE_COMPLEX_SSE_BLOCK1 ELPA_C_2STAGE_COMPLEX_SSE_BLOCK1 #define ELPA_2STAGE_COMPLEX_SSE_BLOCK2 ELPA_C_2STAGE_COMPLEX_SSE_BLOCK2 #define ELPA_2STAGE_COMPLEX_AVX_BLOCK1 ELPA_C_2STAGE_COMPLEX_AVX_BLOCK1 #define ELPA_2STAGE_COMPLEX_AVX_BLOCK2 ELPA_C_2STAGE_COMPLEX_AVX_BLOCK2 #define ELPA_2STAGE_COMPLEX_AVX2_BLOCK1 ELPA_C_2STAGE_COMPLEX_AVX2_BLOCK1 #define ELPA_2STAGE_COMPLEX_AVX2_BLOCK2 ELPA_C_2STAGE_COMPLEX_AVX2_BLOCK2 #define ELPA_2STAGE_COMPLEX_AVX512_BLOCK1 ELPA_C_2STAGE_COMPLEX_AVX512_BLOCK1 #define ELPA_2STAGE_COMPLEX_AVX512_BLOCK2 ELPA_C_2STAGE_COMPLEX_AVX512_BLOCK2 #define ELPA_2STAGE_COMPLEX_GPU ELPA_C_2STAGE_COMPLEX_GPU #define ELPA_2STAGE_COMPLEX_DEFAULT ELPA_C_2STAGE_COMPLEX_DEFAULT #define ELPA_2STAGE_NUMBER_OF_COMPLEX_KERNELS ELPA_C_2STAGE_NUMBER_OF_COMPLEX_KERNELS #endif