real_128bit_BLOCK_template.c 488 KB
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//    This file is part of ELPA.
//
//    The ELPA library was originally created by the ELPA consortium,
//    consisting of the following organizations:
//
//    - Max Planck Computing and Data Facility (MPCDF), formerly known as
//      Rechenzentrum Garching der Max-Planck-Gesellschaft (RZG),
//    - Bergische Universität Wuppertal, Lehrstuhl für angewandte
//      Informatik,
//    - Technische Universität München, Lehrstuhl für Informatik mit
//      Schwerpunkt Wissenschaftliches Rechnen ,
//    - Fritz-Haber-Institut, Berlin, Abt. Theorie,
//    - Max-Plack-Institut für Mathematik in den Naturwissenschaften,
//      Leipzig, Abt. Komplexe Strukutren in Biologie und Kognition,
//      and
//    - IBM Deutschland GmbH
//
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//
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//    This particular source code file contains additions, changes and
//    enhancements authored by Intel Corporation which is not part of
//    the ELPA consortium.
//
//    More information can be found here:
//    http://elpa.mpcdf.mpg.de/
//
//    ELPA is free software: you can redistribute it and/or modify
//    it under the terms of the version 3 of the license of the
//    GNU Lesser General Public License as published by the Free
//    Software Foundation.
//
//    ELPA is distributed in the hope that it will be useful,
//    but WITHOUT ANY WARRANTY; without even the implied warranty of
//    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
//    GNU Lesser General Public License for more details.
//
//    You should have received a copy of the GNU Lesser General Public License
//    along with ELPA. If not, see <http://www.gnu.org/licenses/>
//
//    ELPA reflects a substantial effort on the part of the original
//    ELPA consortium, and we ask you to respect the spirit of the
//    license that we chose: i.e., please contribute any changes you
//    may have back to the original ELPA library distribution, and keep
//    any derivatives of ELPA under the same license that we chose for
//    the original distribution, the GNU Lesser General Public License.
//
// Author: Andreas Marek, MPCDF, based on the double precision case of A. Heinecke
//
#include "config-f90.h"

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#define CONCAT_8ARGS(a, b, c, d, e, f, g, h) CONCAT2_8ARGS(a, b, c, d, e, f, g, h)
#define CONCAT2_8ARGS(a, b, c, d, e, f, g, h) a ## b ## c ## d ## e ## f ## g ## h

#define CONCAT_7ARGS(a, b, c, d, e, f, g) CONCAT2_7ARGS(a, b, c, d, e, f, g)
#define CONCAT2_7ARGS(a, b, c, d, e, f, g) a ## b ## c ## d ## e ## f ## g

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#define CONCAT_6ARGS(a, b, c, d, e, f) CONCAT2_6ARGS(a, b, c, d, e, f)
#define CONCAT2_6ARGS(a, b, c, d, e, f) a ## b ## c ## d ## e ## f

#define CONCAT_5ARGS(a, b, c, d, e) CONCAT2_5ARGS(a, b, c, d, e)
#define CONCAT2_5ARGS(a, b, c, d, e) a ## b ## c ## d ## e

#define CONCAT_4ARGS(a, b, c, d) CONCAT2_4ARGS(a, b, c, d)
#define CONCAT2_4ARGS(a, b, c, d) a ## b ## c ## d

#define CONCAT_3ARGS(a, b, c) CONCAT2_3ARGS(a, b, c)
#define CONCAT2_3ARGS(a, b, c) a ## b ## c

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#if VEC_SET == 128 || VEC_SET == 256 || VEC_SET == 512
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#include <x86intrin.h>
#endif
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#if VEC_SET == 1281
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#include <fjmfunc.h>
#include <emmintrin.h>
#endif
#include <stdio.h>
#include <stdlib.h>

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#ifdef BLOCK6
#define PREFIX hexa
#define BLOCK 6
#endif

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#ifdef BLOCK4
#define PREFIX quad
#define BLOCK 4
#endif

#ifdef BLOCK2
#define PREFIX double
#define BLOCK 2
#endif

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#if VEC_SET == 128
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#define SIMD_SET SSE
#endif

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#if VEC_SET == 1281
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#define SIMD_SET SPARC64
#endif
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#if VEC_SET == 256
#define SIMD_SET AVX_AVX2
#endif

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#if VEC_SET == 512
#define SIMD_SET AVX512
#endif


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#define __forceinline __attribute__((always_inline)) static

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#if VEC_SET == 128 || VEC_SET == 1281
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#ifdef DOUBLE_PRECISION_REAL
#define offset 2
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#define __SIMD_DATATYPE __m128d
#define _SIMD_LOAD _mm_load_pd
#define _SIMD_STORE _mm_store_pd
#define _SIMD_ADD _mm_add_pd
#define _SIMD_MUL _mm_mul_pd
#define _SIMD_SUB _mm_sub_pd
#define _SIMD_XOR _mm_xor_pd
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#if VEC_SET == 128
#define _SIMD_SET _mm_set_pd
#define _SIMD_SET1 _mm_set1_pd
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#endif
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#endif /* DOUBLE_PRECISION_REAL */
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#ifdef SINGLE_PRECISION_REAL
#define offset 4
#define __SIMD_DATATYPE __m128
#define _SIMD_LOAD _mm_load_ps
#define _SIMD_STORE _mm_store_ps
#define _SIMD_ADD _mm_add_ps
#define _SIMD_MUL _mm_mul_ps
#define _SIMD_SUB _mm_sub_ps
#define _SIMD_XOR _mm_xor_ps
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#if VEC_SET == 128
#define _SIMD_SET _mm_set_ps
#define _SIMD_SET1 _mm_set1_ps
#endif 
#endif /* SINGLE_PRECISION_REAL */
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#endif /* VEC_SET == 128 || VEC_SET == 1281 */
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#if VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define offset 4
#define __SIMD_DATATYPE __m256d
#define _SIMD_LOAD _mm256_load_pd
#define _SIMD_STORE _mm256_store_pd
#define _SIMD_ADD _mm256_add_pd
#define _SIMD_MUL _mm256_mul_pd
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#define _SIMD_SUB _mm256_sub_pd
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#define _SIMD_SET1 _mm256_set1_pd
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#define _SIMD_XOR _mm256_xor_pd
#define _SIMD_BROADCAST _mm256_broadcast_sd
#ifdef HAVE_AVX2
#ifdef __FMA4__
#define __ELPA_USE_FMA__
#define _mm256_FMA_pd(a,b,c) _mm256_macc_pd(a,b,c)
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#define _mm256_NFMA_pd(a,b,c) _mm256_nmacc_pd(a,b,c)
#error "This should be prop _mm256_msub_pd instead of _mm256_msub"
#define _mm256_FMSUB_pd(a,b,c) _mm256_msub(a,b,c)
#endif /* __FMA4__ */
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#ifdef __AVX2__
#define __ELPA_USE_FMA__
#define _mm256_FMA_pd(a,b,c) _mm256_fmadd_pd(a,b,c)
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#define _mm256_NFMA_pd(a,b,c) _mm256_fnmadd_pd(a,b,c)
#define _mm256_FMSUB_pd(a,b,c) _mm256_fmsub_pd(a,b,c)
#endif /* __AVX2__ */
#ifdef __ELPA_USE_FMA__
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#define _SIMD_FMA _mm256_FMA_pd
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#define _SIMD_NFMA _mm256_NFMA_pd
#define _SIMD_FMSUB _mm256_FMSUB_pd
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#endif
#endif /* HAVE_AVX2 */
#endif /* DOUBLE_PRECISION_REAL */

#ifdef SINGLE_PRECISION_REAL
#define offset 8
#define __SIMD_DATATYPE __m256
#define _SIMD_LOAD _mm256_load_ps
#define _SIMD_STORE _mm256_store_ps
#define _SIMD_ADD _mm256_add_ps
#define _SIMD_MUL _mm256_mul_ps
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#define _SIMD_SUB _mm256_sub_ps
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#define _SIMD_SET1 _mm256_set1_ps
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#define _SIMD_XOR _mm256_xor_ps
#define _SIMD_BROADCAST _mm256_broadcast_ss
#ifdef HAVE_AVX2
#ifdef __FMA4__
#define __ELPA_USE_FMA__
#define _mm256_FMA_ps(a,b,c) _mm256_macc_ps(a,b,c)
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#define _mm256_NFMA_ps(a,b,c) _mm256_nmacc_ps(a,b,c)
#error "This should be prop _mm256_msub_ps instead of _mm256_msub"
#define _mm256_FMSUB_ps(a,b,c) _mm256_msub(a,b,c)
#endif /* __FMA4__ */
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#ifdef __AVX2__
#define __ELPA_USE_FMA__
#define _mm256_FMA_ps(a,b,c) _mm256_fmadd_ps(a,b,c)
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#define _mm256_NFMA_ps(a,b,c) _mm256_fnmadd_ps(a,b,c)
#define _mm256_FMSUB_ps(a,b,c) _mm256_fmsub_ps(a,b,c)
#endif /* __AVX2__ */
#ifdef __ELPA_USE_FMA__
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#define _SIMD_FMA _mm256_FMA_ps
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#define _SIMD_NFMA _mm256_NFMA_ps
#define _SIMD_FMSUB _mm256_FMSUB_ps
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#endif
#endif /* HAVE_AVX2 */
#endif /* SINGLE_PRECISION_REAL */
#endif /* VEC_SET == 256 */

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#if VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#define offset 8
#define __SIMD_DATATYPE __m512d
#define __SIMD_INTEGER  __m512i
#define _SIMD_LOAD _mm512_load_pd
#define _SIMD_STORE _mm512_store_pd
#define _SIMD_ADD _mm512_add_pd
#define _SIMD_MUL _mm512_mul_pd
#define _SIMD_SUB _mm512_sub_pd
#define _SIMD_SET1 _mm512_set1_pd
#ifdef HAVE_AVX512_XEON
#define _SIMD_XOR _mm512_xor_pd
#endif
#ifdef HAVE_AVX512
#define __ELPA_USE_FMA__
#define _mm512_FMA_pd(a,b,c) _mm512_fmadd_pd(a,b,c)
#ifdef __ELPA_USE_FMA__
#define _SIMD_FMA _mm512_FMA_pd
#endif
#endif /* HAVE_AVX512 */
#endif /* DOUBLE_PRECISION_REAL */

#ifdef SINGLE_PRECISION_REAL
#define offset 16
#define __SIMD_DATATYPE __m512
#define __SIMD_INTEGER  __m512i
#define _SIMD_LOAD _mm512_load_ps
#define _SIMD_STORE _mm512_store_ps
#define _SIMD_ADD _mm512_add_ps
#define _SIMD_MUL _mm512_mul_ps
#define _SIMD_SUB _mm512_sub_ps
#define _SIMD_SET1 _mm512_set1_ps
#ifdef HAVE_AVX512_XEON
#define _SIMD_XOR _mm512_xor_ps
#endif
#ifdef HAVE_AVX512
#define __ELPA_USE_FMA__
#define _mm512_FMA_ps(a,b,c) _mm512_fmadd_ps(a,b,c)
#ifdef __ELPA_USE_FMA__
#define _SIMD_FMA _mm512_FMA_ps
#endif
#endif /* HAVE_AVX512 */
#endif /* SINGLE_PRECISION_REAL */
#endif /* VEC_SET == 512 */

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#ifdef DOUBLE_PRECISION_REAL
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#define WORD_LENGTH double
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#define DATA_TYPE double
#define DATA_TYPE_PTR double*
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#endif
#ifdef SINGLE_PRECISION_REAL
#define WORD_LENGTH single
#define DATA_TYPE float
#define DATA_TYPE_PTR float*
#endif

#if VEC_SET == 128
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#undef __AVX__
#endif

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#if VEC_SET == 128 || VEC_SET == 1281
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//Forward declaration
#ifdef DOUBLE_PRECISION_REAL
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#undef ROW_LENGTH
#define ROW_LENGTH 2
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#endif
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#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 4
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#endif
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#endif /* VEC_SET == 128 || VEC_SET == 1281 */
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#if VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 4
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 8
#endif
#endif /* VEC_SET == 256 */
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#if VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 8
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 16
#endif
#endif /* VEC_SET == 512 */
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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh, 
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#ifdef BLOCK2
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	DATA_TYPE s);
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#endif
#ifdef BLOCK4
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	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
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#endif
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#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
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#endif
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#if VEC_SET == 128 || VEC_SET == 1281
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#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 4
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#endif
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#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 8
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#endif
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#endif /* VEC_SET == 128 || VEC_SET == 1281 */

#if VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 8
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 16
#endif
#endif /* VEC_SET == 256 */
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#if VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 16
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 32
#endif
#endif /* VEC_SET == 512 */
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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh, 
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#ifdef BLOCK2
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	DATA_TYPE s);
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#endif
#ifdef BLOCK4
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	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
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#endif
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#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
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#endif
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#if VEC_SET == 128 || VEC_SET == 1281 
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#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 6
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#endif
#ifdef SINGLE_PRECISION_REAL
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#undef ROW_LENGTH
#define ROW_LENGTH 12
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#endif
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#endif /* VEC_SET == 128 || VEC_SET == 1281  */

#if VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 12
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 24
#endif
#endif /* VEC_SET == 256 */

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#if VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 24
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 48
#endif
#endif /* VEC_SET == 512 */

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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh,
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#ifdef BLOCK2
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	DATA_TYPE s);
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#endif
#ifdef BLOCK4
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	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
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#endif
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#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
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#endif
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#if VEC_SET == 128 || VEC_SET == 1281 
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#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 8
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#endif
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#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 16
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#endif
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#endif /* VEC_SET == 128 || VEC_SET == 1281  */

#if VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 16
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 32
#endif
#endif /* VEC_SET == 256 */

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#if VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 32
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 64
#endif
#endif /* VEC_SET == 512 */

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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh, 
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#ifdef BLOCK2
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	DATA_TYPE s);
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#endif
#ifdef BLOCK4
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	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
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#endif
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#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
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#endif
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#if  VEC_SET == 128 || VEC_SET == 1281
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#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 10
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#endif
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#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 20
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#endif
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#endif /*  VEC_SET == 128 || VEC_SET == 1281 */

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 20
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 40
#endif
#endif /*  VEC_SET == 256 */

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#if VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 40
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 80
#endif
#endif /* VEC_SET == 512 */
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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh, 
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#ifdef BLOCK2
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	DATA_TYPE s);
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#endif
#ifdef BLOCK4
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	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
#endif
#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
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#endif

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#if  VEC_SET == 128 || VEC_SET == 1281
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#ifdef DOUBLE_PRECISION_REAL
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#undef ROW_LENGTH
#define ROW_LENGTH 12
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#endif
#ifdef SINGLE_PRECISION_REAL
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#undef ROW_LENGTH
#define ROW_LENGTH 24
#endif
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#endif /* VEC_SET == 128 || VEC_SET == 1281 */

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 24
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 48
#endif
#endif /*  VEC_SET == 256 */
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#if VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 48
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 96
#endif
#endif /* VEC_SET == 512 */

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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh,
#ifdef BLOCK2
	DATA_TYPE s);
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#endif
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#ifdef BLOCK4
	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
#endif
#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
#endif

void CONCAT_7ARGS(PREFIX,_hh_trafo_real_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int* pnb, int* pnq, int* pldq, int* pldh);
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/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine double_hh_trafo_real_SSE_2hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="double_hh_trafo_real_SSE_2hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine double_hh_trafo_real_SSE_2hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="double_hh_trafo_real_SSE_2hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_float)  :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine double_hh_trafo_real_SPARC64_2hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="double_hh_trafo_real_SPARC64_2hv_double")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_double) :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine double_hh_trafo_real_SPARC64_2hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="double_hh_trafo_real_SPARC64_2hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_float)  :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

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/*
!f>#if defined(HAVE_AVX) || defined(HAVE_AVX2)
!f> interface
!f>   subroutine double_hh_trafo_real_AVX_AVX2_2hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="double_hh_trafo_real_AVX_AVX2_2hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

/*
!f>#if defined(HAVE_AVX) || defined(HAVE_AVX2)
!f> interface
!f>   subroutine double_hh_trafo_real_AVX_AVX2_2hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="double_hh_trafo_real_AVX_AVX2_2hv_single")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)       :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_float)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

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/*
!f>#if defined(HAVE_AVX512)
!f> interface
!f>   subroutine double_hh_trafo_real_AVX512_2hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                             bind(C, name="double_hh_trafo_real_AVX512_2hv_double")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int)     :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value      :: q
!f>     real(kind=c_double)     :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#if defined(HAVE_AVX512)
!f> interface
!f>   subroutine double_hh_trafo_real_AVX512_2hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>                             bind(C, name="double_hh_trafo_real_AVX512_2hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int)     :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value      :: q
!f>     real(kind=c_float)      :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

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/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine quad_hh_trafo_real_SSE_4hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="quad_hh_trafo_real_SSE_4hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine quad_hh_trafo_real_SSE_4hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="quad_hh_trafo_real_SSE_4hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_float)  :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine quad_hh_trafo_real_SPARC64_4hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="quad_hh_trafo_real_SPARC64_4hv_double")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_double) :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine quad_hh_trafo_real_SPARC64_4hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="quad_hh_trafo_real_SPARC64_4hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_float)  :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
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/*
!f>#if defined(HAVE_AVX) || defined(HAVE_AVX2)
!f> interface
!f>   subroutine quad_hh_trafo_real_AVX_AVX2_4hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="quad_hh_trafo_real_AVX_AVX2_4hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#if defined(HAVE_AVX) || defined(HAVE_AVX2)
!f> interface
!f>   subroutine quad_hh_trafo_real_AVX_AVX2_4hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="quad_hh_trafo_real_AVX_AVX2_4hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_float)  :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

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/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine hexa_hh_trafo_real_sse_6hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="hexa_hh_trafo_real_SSE_6hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine hexa_hh_trafo_real_sparc64_6hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="hexa_hh_trafo_real_SPARC64_6hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine hexa_hh_trafo_real_sse_6hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="hexa_hh_trafo_real_SSE_6hv_single")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_float)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine hexa_hh_trafo_real_sparc64_6hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="hexa_hh_trafo_real_SPARC64_6hv_single")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_float)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

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/*
!f>#if defined(HAVE_AVX) || defined(HAVE_AVX2)
!f> interface
!f>   subroutine hexa_hh_trafo_real_AVX_AVX2_6hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                             bind(C, name="hexa_hh_trafo_real_AVX_AVX2_6hv_double")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int)     :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value      :: q
!f>     real(kind=c_double)     :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#if defined(HAVE_AVX) || defined(HAVE_AVX2)
!f> interface
!f>   subroutine hexa_hh_trafo_real_AVX_AVX2_6hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>                             bind(C, name="hexa_hh_trafo_real_AVX_AVX2_6hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int)     :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value      :: q
!f>     real(kind=c_float)      :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/


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void CONCAT_7ARGS(PREFIX,_hh_trafo_real_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int* pnb, int* pnq, int* pldq, int* pldh)
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{
  int i;
  int nb = *pnb;
  int nq = *pldq;
  int ldq = *pldq;
  int ldh = *pldh;
  int worked_on;

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  worked_on = 0;

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#ifdef BLOCK2
  // calculating scalar product to compute
  // 2 householder vectors simultaneously
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  DATA_TYPE s = hh[(ldh)+1]*1.0;
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#endif

#ifdef BLOCK4
  // calculating scalar products to compute
  // 4 householder vectors simultaneously
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  DATA_TYPE s_1_2 = hh[(ldh)+1];  
  DATA_TYPE s_1_3 = hh[(ldh*2)+2];
  DATA_TYPE s_2_3 = hh[(ldh*2)+1];
  DATA_TYPE s_1_4 = hh[(ldh*3)+3];
  DATA_TYPE s_2_4 = hh[(ldh*3)+2];
  DATA_TYPE s_3_4 = hh[(ldh*3)+1];

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  // calculate scalar product of first and fourth householder Vector
  // loop counter = 2
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  s_1_2 += hh[2-1] * hh[(2+ldh)];          
  s_2_3 += hh[(ldh)+2-1] * hh[2+(ldh*2)];  
  s_3_4 += hh[(ldh*2)+2-1] * hh[2+(ldh*3)];
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  // loop counter = 3
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  s_1_2 += hh[3-1] * hh[(3+ldh)];          
  s_2_3 += hh[(ldh)+3-1] * hh[3+(ldh*2)];  
  s_3_4 += hh[(ldh*2)+3-1] * hh[3+(ldh*3)];
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  s_1_3 += hh[3-2] * hh[3+(ldh*2)];        
  s_2_4 += hh[(ldh*1)+3-2] * hh[3+(ldh*3)];
#endif /* BLOCK4 */

#ifdef BLOCK6
  // calculating scalar products to compute
  // 6 householder vectors simultaneously
  DATA_TYPE scalarprods[15];

  scalarprods[0] = hh[(ldh+1)];  
  scalarprods[1] = hh[(ldh*2)+2];
  scalarprods[2] = hh[(ldh*2)+1];
  scalarprods[3] = hh[(ldh*3)+3];
  scalarprods[4] = hh[(ldh*3)+2];
  scalarprods[5] = hh[(ldh*3)+1];
  scalarprods[6] = hh[(ldh*4)+4];
  scalarprods[7] = hh[(ldh*4)+3];
  scalarprods[8] = hh[(ldh*4)+2];
  scalarprods[9] = hh[(ldh*4)+1];
  scalarprods[10] = hh[(ldh*5)+5];
  scalarprods[11] = hh[(ldh*5)+4];
  scalarprods[12] = hh[(ldh*5)+3];
  scalarprods[13] = hh[(ldh*5)+2];
  scalarprods[14] = hh[(ldh*5)+1];

  // calculate scalar product of first and fourth householder Vector
  // loop counter = 2
  scalarprods[0] += hh[1] * hh[(2+ldh)];           
  scalarprods[2] += hh[(ldh)+1] * hh[2+(ldh*2)];   
  scalarprods[5] += hh[(ldh*2)+1] * hh[2+(ldh*3)]; 
  scalarprods[9] += hh[(ldh*3)+1] * hh[2+(ldh*4)]; 
  scalarprods[14] += hh[(ldh*4)+1] * hh[2+(ldh*5)];

  // loop counter = 3
  scalarprods[0] += hh[2] * hh[(3+ldh)];          
  scalarprods[2] += hh[(ldh)+2] * hh[3+(ldh*2)];  
  scalarprods[5] += hh[(ldh*2)+2] * hh[3+(ldh*3)];
  scalarprods[9] += hh[(ldh*3)+2] * hh[3+(ldh*4)];
  scalarprods[14] += hh[(ldh*4)+2] * hh[3+(ldh*5)];

  scalarprods[1] += hh[1] * hh[3+(ldh*2)];         
  scalarprods[4] += hh[(ldh*1)+1] * hh[3+(ldh*3)]; 
  scalarprods[8] += hh[(ldh*2)+1] * hh[3+(ldh*4)]; 
  scalarprods[13] += hh[(ldh*3)+1] * hh[3+(ldh*5)];

  // loop counter = 4
  scalarprods[0] += hh[3] * hh[(4+ldh)];           
  scalarprods[2] += hh[(ldh)+3] * hh[4+(ldh*2)];   
  scalarprods[5] += hh[(ldh*2)+3] * hh[4+(ldh*3)]; 
  scalarprods[9] += hh[(ldh*3)+3] * hh[4+(ldh*4)]; 
  scalarprods[14] += hh[(ldh*4)+3] * hh[4+(ldh*5)];

  scalarprods[1] += hh[2] * hh[4+(ldh*2)];         
  scalarprods[4] += hh[(ldh*1)+2] * hh[4+(ldh*3)]; 
  scalarprods[8] += hh[(ldh*2)+2] * hh[4+(ldh*4)]; 
  scalarprods[13] += hh[(ldh*3)+2] * hh[4+(ldh*5)];

  scalarprods[3] += hh[1] * hh[4+(ldh*3)];         
  scalarprods[7] += hh[(ldh)+1] * hh[4+(ldh*4)];   
  scalarprods[12] += hh[(ldh*2)+1] * hh[4+(ldh*5)];

  // loop counter = 5
  scalarprods[0] += hh[4] * hh[(5+ldh)];           
  scalarprods[2] += hh[(ldh)+4] * hh[5+(ldh*2)];   
  scalarprods[5] += hh[(ldh*2)+4] * hh[5+(ldh*3)]; 
  scalarprods[9] += hh[(ldh*3)+4] * hh[5+(ldh*4)]; 
  scalarprods[14] += hh[(ldh*4)+4] * hh[5+(ldh*5)];

  scalarprods[1] += hh[3] * hh[5+(ldh*2)];         
  scalarprods[4] += hh[(ldh*1)+3] * hh[5+(ldh*3)]; 
  scalarprods[8] += hh[(ldh*2)+3] * hh[5+(ldh*4)]; 
  scalarprods[13] += hh[(ldh*3)+3] * hh[5+(ldh*5)];

  scalarprods[3] += hh[2] * hh[5+(ldh*3)];         
  scalarprods[7] += hh[(ldh)+2] * hh[5+(ldh*4)];   
  scalarprods[12] += hh[(ldh*2)+2] * hh[5+(ldh*5)];

  scalarprods[6] += hh[1] * hh[5+(ldh*4)];         
  scalarprods[11] += hh[(ldh)+1] * hh[5+(ldh*5)];  


#endif /* BLOCK6 */
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#if VEC_SET == 128 || VEC_SET == 256 || VEC_SET == 512
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  #pragma ivdep
#endif
  for (i = BLOCK; i < nb; i++)
    {
#ifdef BLOCK2
      s += hh[i-1] * hh[(i+ldh)];
#endif
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#ifdef BLOCK4
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      s_1_2 += hh[i-1] * hh[(i+ldh)];           
      s_2_3 += hh[(ldh)+i-1] * hh[i+(ldh*2)];   
      s_3_4 += hh[(ldh*2)+i-1] * hh[i+(ldh*3)]; 
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      s_1_3 += hh[i-2] * hh[i+(ldh*2)];         
      s_2_4 += hh[(ldh*1)+i-2] * hh[i+(ldh*3)]; 

      s_1_4 += hh[i-3] * hh[i+(ldh*3)];         
#endif /* BLOCK4 */
951

952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
#ifdef BLOCK6
      scalarprods[0] += hh[i-1] * hh[(i+ldh)];           
      scalarprods[2] += hh[(ldh)+i-1] * hh[i+(ldh*2)];   
      scalarprods[5] += hh[(ldh*2)+i-1] * hh[i+(ldh*3)]; 
      scalarprods[9] += hh[(ldh*3)+i-1] * hh[i+(ldh*4)]; 
      scalarprods[14] += hh[(ldh*4)+i-1] * hh[i+(ldh*5)];

      scalarprods[1] += hh[i-2] * hh[i+(ldh*2)];         
      scalarprods[4] += hh[(ldh*1)+i-2] * hh[i+(ldh*3)]; 
      scalarprods[8] += hh[(ldh*2)+i-2] * hh[i+(ldh*4)]; 
      scalarprods[13] += hh[(ldh*3)+i-2] * hh[i+(ldh*5)];

      scalarprods[3] += hh[i-3] * hh[i+(ldh*3)];         
      scalarprods[7] += hh[(ldh)+i-3] * hh[i+(ldh*4)];   
      scalarprods[12] += hh[(ldh*2)+i-3] * hh[i+(ldh*5)];

      scalarprods[6] += hh[i-4] * hh[i+(ldh*4)];         
      scalarprods[11] += hh[(ldh)+i-4] * hh[i+(ldh*5)];  

      scalarprods[10] += hh[i-5] * hh[i+(ldh*5)];        
#endif /* BLOCK6 */
973
974
975
976

    }

  // Production level kernel calls with padding
977
978
#ifdef BLOCK2

979
#if  VEC_SET == 128 || VEC_SET == 1281
980
#ifdef DOUBLE_PRECISION_REAL
981
982
983
#define STEP_SIZE 12
#define ROW_LENGTH 12
#define UPPER_BOUND 10
984
985
#endif
#ifdef SINGLE_PRECISION_REAL
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
#define STEP_SIZE 24
#define ROW_LENGTH 24
#define UPPER_BOUND 20
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define STEP_SIZE 24
#define ROW_LENGTH 24
#define UPPER_BOUND 20
#endif
#ifdef SINGLE_PRECISION_REAL
#define STEP_SIZE 48
#define ROW_LENGTH 48
#define UPPER_BOUND 40
#endif
1003
#endif /*  VEC_SET == 256 */
1004

1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
#if  VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#define STEP_SIZE 32
#define ROW_LENGTH 32
#define UPPER_BOUND 24
#endif
#ifdef SINGLE_PRECISION_REAL
#define STEP_SIZE 64
#define ROW_LENGTH 64
#define UPPER_BOUND 48
#endif
#endif /*  VEC_SET == 512 */


1019
  for (i = 0; i < nq - UPPER_BOUND; i+= STEP_SIZE )
1020
    {
1021
1022
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
1023
1024
1025
1026
1027
1028
1029
    }

  if (nq == i)
    {
      return;
    }

1030
1031
#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
1032
#ifdef DOUBLE_PRECISION_REAL
1033
#define ROW_LENGTH 10
1034
1035
#endif
#ifdef SINGLE_PRECISION_REAL
1036
#define ROW_LENGTH 20
1037
#endif
1038
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
1039

1040
#if  VEC_SET == 256
1041
#ifdef DOUBLE_PRECISION_REAL
1042
#define ROW_LENGTH 20
1043
1044
#endif
#ifdef SINGLE_PRECISION_REAL
1045
#define ROW_LENGTH 40
1046
#endif
1047
#endif /* VEC_SET == 256 */
1048

1049
1050
1051
1052
1053
1054
1055
1056
1057
#if  VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 24
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 48
#endif
#endif /* VEC_SET == 512 */

1058
  if (nq-i == ROW_LENGTH)
1059
    {
1060
1061
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
1062
    }
1063
1064
1065
1066
1067

#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 8
1068
#endif
1069
1070
1071
1072
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 16
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
1073

1074
1075
1076
1077
#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 16
#endif
1078
#ifdef SINGLE_PRECISION_REAL
1079
1080
1081
1082
#define ROW_LENGTH 32
#endif
#endif /* VEC_SET == 256 */

1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
#if  VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 16
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 32
#endif
#endif /* VEC_SET == 512 */


1093
  if (nq-i == ROW_LENGTH)
1094
    {
1095
1096
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
1097
    }
1098
1099
1100
1101
1102

#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 6
1103
#endif
1104
1105
1106
1107
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 12
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
1108

1109
#if  VEC_SET == 256
1110
#ifdef DOUBLE_PRECISION_REAL
1111
1112
1113
1114
1115
1116
1117
#define ROW_LENGTH 12
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 24
#endif
#endif /* VEC_SET == 256 */

1118
1119
1120
1121
1122
1123
1124
1125
#if  VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 8
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 16
#endif
#endif /* VEC_SET == 512 */
1126
  if (nq-i == ROW_LENGTH)
1127
    {
1128
1129
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
1130
1131
    }

1132
1133
#if VEC_SET == 128 || VEC_SET == 1281 || VEC_SET == 256

1134
1135
1136
1137
1138
#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 4
#endif
1139
#ifdef SINGLE_PRECISION_REAL
1140
#define ROW_LENGTH 8
1141
#endif
1142
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
1143

1144
#if  VEC_SET == 256
1145
#ifdef DOUBLE_PRECISION_REAL
1146
1147
1148
1149
1150
1151
1152
1153
1154
#define ROW_LENGTH 8
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 16
#endif
#endif /* VEC_SET == 256 */


  if (nq-i == ROW_LENGTH)
1155
    {
1156
1157
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
1158
    }
1159
1160
1161
1162
1163
1164
1165
1166

#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 2
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 4
1167
#endif
1168
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
1169

1170
1171
1172
1173
#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 4
#endif
1174
#ifdef SINGLE_PRECISION_REAL
1175
1176
1177
1178
1179
#define ROW_LENGTH 8
#endif
#endif /* VEC_SET == 256 */

  if (nq-i == ROW_LENGTH)
1180
    {
1181
1182
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
1183
1184
    }

1185
1186
#endif /* VEC_SET == 128 || VEC_SET == 1281 || VEC_SET == 256 */

1187
1188
1189
#endif /* BLOCK2 */

#ifdef BLOCK4
1190
1191
1192
1193


#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
1194
#ifdef DOUBLE_PRECISION_REAL
1195
1196
1197
1198
1199
1200
1201
1202
#define ROW_LENGTH 6
#define STEP_SIZE 6
#define UPPER_BOUND 4
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 12
#define STEP_SIZE 12
#define UPPER_BOUND 8
1203
#endif
1204
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
1205

1206
1207
1208
1209
1210
1211
#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 12
#define STEP_SIZE 12
#define UPPER_BOUND 8
#endif
1212
#ifdef SINGLE_PRECISION_REAL
1213
1214
1215
1216
1217
1218
1219
#define ROW_LENGTH 24
#define STEP_SIZE 24
#define UPPER_BOUND 16
#endif
#endif /* VEC_SET == 256 */

  for (i = 0; i < nq - UPPER_BOUND; i+= STEP_SIZE )
1220
    {
1221
1222
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_4hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s_1_2, s_1_3, s_2_3, s_1_4, s_2_4, s_3_4);
      worked_on += ROW_LENGTH;
1223
1224
1225
1226
1227
1228
1229
    }

  if (nq == i)
    {
      return;
    }

1230
1231
1232

#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
1233
#ifdef DOUBLE_PRECISION_REAL
1234
1235
1236
1237
#define ROW_LENGTH 4
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 8
1238
#endif
1239
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
1240

1241
1242
1243
1244
#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 8
#endif
1245
#ifdef SINGLE_PRECISION_REAL
1246
1247
1248
1249
1250
#define ROW_LENGTH 16
#endif
#endif /* VEC_SET == 256 */

  if (nq-i == ROW_LENGTH )
1251
    {
1252
1253
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_4hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s_1_2, s_1_3, s_2_3, s_1_4, s_2_4, s_3_4);
      worked_on += ROW_LENGTH;
1254
1255
    }

1256
1257
#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
1258
#ifdef DOUBLE_PRECISION_REAL
1259
#define ROW_LENGTH 2
1260
#endif
1261
1262
1263
1264
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 4
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
1265

1266
1267
1268
1269
#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 4
#endif
1270
#ifdef SINGLE_PRECISION_REAL
1271
#define ROW_LENGTH 8
1272
#endif
1273
1274
1275
1276
1277
1278
1279
#endif /* VEC_SET == 256 */

   if (nq-i == ROW_LENGTH )
     {
       CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_4hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s_1_2, s_1_3, s_2_3, s_1_4, s_2_4, s_3_4);
       worked_on += ROW_LENGTH;
     }
1280
1281
1282

#endif /* BLOCK4 */

1283
#ifdef BLOCK6
1284
1285
1286

#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
1287
#ifdef DOUBLE_PRECISION_REAL
1288
1289
1290
#define ROW_LENGTH 4
#define STEP_SIZE 4
#define UPPER_BOUND 2
1291
1292
#endif
#ifdef SINGLE_PRECISION_REAL
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
#define ROW_LENGTH 8
#define STEP_SIZE 8
#define UPPER_BOUND 4
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 8
#define STEP_SIZE 8
#define UPPER_BOUND 4
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 16
#define STEP_SIZE 16
#define UPPER_BOUND 8
1309
#endif
1310
1311
1312
1313
1314
1315
1316
#endif /* VEC_SET == 256 */

  for (i = 0; i < nq - UPPER_BOUND; i+= STEP_SIZE)
    { 
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_6hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, scalarprods);
      worked_on += ROW_LENGTH;
    }
1317
1318
1319
1320
    if (nq == i)
      {
        return;
      }
1321
1322
1323

#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
1324
#ifdef DOUBLE_PRECISION_REAL
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
#define ROW_LENGTH 2
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 4
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 4
1335
1336
#endif
#ifdef SINGLE_PRECISION_REAL
1337
1338
1339
1340
1341
#define ROW_LENGTH 8
#endif
#endif /* VEC_SET == 256 */

    if (nq -i == ROW_LENGTH )
1342
      {
1343
1344
        CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_6hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, scalarprods);
        worked_on += ROW_LENGTH;
1345
1346
1347
1348
      }
  
#endif /* BLOCK6 */

1349
1350
1351
#ifdef WITH_DEBUG
  if (worked_on != nq)
    {
1352
      printf("Error in real SIMD_SET BLOCK BLOCK kernel %d %d\n", worked_on, nq);
1353
1354
1355
1356
1357
      abort();
    }
#endif
}

1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 12
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 24
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 24
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 48
#endif
#endif /* VEC_SET == 256 */
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385

#if  VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 48
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 96
#endif
#endif /* VEC_SET == 512 */

1386
1387
/*
 * Unrolled kernel that computes
1388
 * ROW_LENGTH rows of Q simultaneously, a
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
 * matrix Vector product with two householder
 */
#ifdef BLOCK2
/*
 * vectors + a rank 2 update is performed
 */
#endif
#ifdef BLOCK4
/*
 * vectors + a rank 1 update is performed
 */
#endif
1401
__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh,
1402
#ifdef BLOCK2
1403
               DATA_TYPE s)
1404
1405
#endif
#ifdef BLOCK4
1406
1407
1408
1409
               DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4)
#endif 
#ifdef BLOCK6
               DATA_TYPE_PTR scalarprods)
1410
1411
1412
1413
1414
1415
1416
1417
#endif
  {
#ifdef BLOCK2
    /////////////////////////////////////////////////////
    // Matrix Vector Multiplication, Q [10 x nb+1] * hh
    // hh contains two householder vectors, with offset 1
    /////////////////////////////////////////////////////
#endif
1418
#if defined(BLOCK4) || defined(BLOCK6)
1419
1420
1421
1422
1423
1424
1425
1426
1427
    /////////////////////////////////////////////////////
    // Matrix Vector Multiplication, Q [10 x nb+3] * hh
    // hh contains four householder vectors
    /////////////////////////////////////////////////////
#endif

    int i;

#ifdef BLOCK2
1428
#if VEC_SET == 128
1429
1430
    // Needed bit mask for floating point sign flip
#ifdef DOUBLE_PRECISION_REAL
1431
1432
1433
1434
1435
    __SIMD_DATATYPE sign = (__SIMD_DATATYPE)_mm_set1_epi64x(0x8000000000000000LL);
#endif
#ifdef SINGLE_PRECISION_REAL
    __SIMD_DATATYPE sign = _mm_castsi128_ps(_mm_set_epi32(0x80000000, 0x80000000, 0x80000000, 0x80000000));
#endif
1436
#endif /* VEC_SET == 128 */
1437
1438
1439
1440

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
        __SIMD_DATATYPE sign = (__SIMD_DATATYPE)_mm256_set1_epi64x(0x8000000000000000);
1441
1442
#endif
#ifdef SINGLE_PRECISION_REAL
1443
1444
1445
1446
        __SIMD_DATATYPE sign = (__SIMD_DATATYPE)_mm256_set1_epi32(0x80000000);
#endif
#endif /* VEC_SET == 256 */

1447
1448
#if  VEC_SET == 512
#ifdef DOUBLE_PRECISION_REAL
1449
        __SIMD_DATATYPE sign = (__SIMD_DATATYPE)_mm512_set1_epi64(0x8000000000000000);
1450
1451
1452
1453
1454
1455
#endif
#ifdef SINGLE_PRECISION_REAL
        __SIMD_DATATYPE sign = (__SIMD_DATATYPE)_mm512_set1_epi32(0x80000000);
#endif
#endif /* VEC_SET == 512 */

1456
1457
1458
1459
1460
1461
1462
    __SIMD_DATATYPE x1 = _SIMD_LOAD(&q[ldq]);
    __SIMD_DATATYPE x2 = _SIMD_LOAD(&q[ldq+offset]);
    __SIMD_DATATYPE x3 = _SIMD_LOAD(&q[ldq+2*offset]);
    __SIMD_DATATYPE x4 = _SIMD_LOAD(&q[ldq+3*offset]);
    __SIMD_DATATYPE x5 = _SIMD_LOAD(&q[ldq+4*offset]);
    __SIMD_DATATYPE x6 = _SIMD_LOAD(&q[ldq+5*offset]);

1463
1464
#if VEC_SET == 128 || VEC_SET == 512
    __SIMD_DATATYPE h1 = _SIMD_SET1(hh[ldh+1]);
1465
1466
#endif
#if VEC_SET == 1281
1467
    __SIMD_DATATYPE h1 = _SIMD_SET(hh[ldh+1], hh[ldh+1]);
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
#endif
#if VEC_SET == 256
    __SIMD_DATATYPE h1 = _SIMD_BROADCAST(&hh[ldh+1]);
#endif
 
    __SIMD_DATATYPE h2;
#ifdef __ELPA_USE_FMA__
    __SIMD_DATATYPE q1 = _SIMD_LOAD(q);
    __SIMD_DATATYPE y1 = _SIMD_FMA(x1, h1, q1);
    __SIMD_DATATYPE q2 = _SIMD_LOAD(&q[offset]);
    __SIMD_DATATYPE y2 = _SIMD_FMA(x2, h1, q2);
    __SIMD_DATATYPE q3 = _SIMD_LOAD(&q[2*offset]);
    __SIMD_DATATYPE y3 = _SIMD_FMA(x3, h1, q3);
    __SIMD_DATATYPE q4 = _SIMD_LOAD(&q[3*offset]);
    __SIMD_DATATYPE y4 = _SIMD_FMA(x4, h1, q4);
    __SIMD_DATATYPE q5 = _SIMD_LOAD(&q[4*offset]);
    __SIMD_DATATYPE y5 = _SIMD_FMA(x5, h1, q5);
    __SIMD_DATATYPE q6 = _SIMD_LOAD(&q[5*offset]);
    __SIMD_DATATYPE y6 = _SIMD_FMA(x6, h1, q6);
#else
    __SIMD_DATATYPE q1 = _SIMD_LOAD(q);
    __SIMD_DATATYPE y1 = _SIMD_ADD(q1, _SIMD_MUL(x1, h1));
    __SIMD_DATATYPE q2 = _SIMD_LOAD(&q[offset]);
    __SIMD_DATATYPE y2 = _SIMD_ADD(q2, _SIMD_MUL(x2, h1));
    __SIMD_DATATYPE q3 = _SIMD_LOAD(&q[2*offset]);
    __SIMD_DATATYPE y3 = _SIMD_ADD(q3, _SIMD_MUL(x3, h1));
    __SIMD_DATATYPE q4 = _SIMD_LOAD(&q[3*offset]);
    __SIMD_DATATYPE y4 = _SIMD_ADD(q4, _SIMD_MUL(x4, h1));
    __SIMD_DATATYPE q5 = _SIMD_LOAD(&q[4*offset]);
    __SIMD_DATATYPE y5 = _SIMD_ADD(q5, _SIMD_MUL(x5, h1));
    __SIMD_DATATYPE q6 = _SIMD_LOAD(&q[5*offset]);
    __SIMD_DATATYPE y6 = _SIMD_ADD(q6, _SIMD_MUL(x6, h1));
#endif
1501
1502
1503
#endif /* BLOCK2 */

#ifdef BLOCK4
1504
1505
1506
1507
1508
1509
    __SIMD_DATATYPE a1_1 = _SIMD_LOAD(&q[ldq*3]);
    __SIMD_DATATYPE a2_1 = _SIMD_LOAD(&q[ldq*2]);
    __SIMD_DATATYPE a3_1 = _SIMD_LOAD(&q[ldq]);  
    __SIMD_DATATYPE a4_1 = _SIMD_LOAD(&q[0]);    

#if VEC_SET == 128
1510
1511
1512
1513
1514
1515
    __SIMD_DATATYPE h_2_1 = _SIMD_SET1(hh[ldh+1]);    
    __SIMD_DATATYPE h_3_2 = _SIMD_SET1(hh[(ldh*2)+1]);
    __SIMD_DATATYPE h_3_1 = _SIMD_SET1(hh[(ldh*2)+2]);
    __SIMD_DATATYPE h_4_3 = _SIMD_SET1(hh[(ldh*3)+1]);
    __SIMD_DATATYPE h_4_2 = _SIMD_SET1(hh[(ldh*3)+2]);
    __SIMD_DATATYPE h_4_1 = _SIMD_SET1(hh[(ldh*3)+3]);
1516
1517
1518
#endif

#if VEC_SET == 1281
1519
1520
1521
1522
1523
1524
    __SIMD_DATATYPE h_2_1 = _SIMD_SET(hh[ldh+1], hh[ldh+1]);
    __SIMD_DATATYPE h_3_2 = _SIMD_SET(hh[(ldh*2)+1], hh[(ldh*2)+1]);
    __SIMD_DATATYPE h_3_1 = _SIMD_SET(hh[(ldh*2)+2], hh[(ldh*2)+2]);
    __SIMD_DATATYPE h_4_3 = _SIMD_SET(hh[(ldh*3)+1], hh[(ldh*3)+1]);
    __SIMD_DATATYPE h_4_2 = _SIMD_SET(hh[(ldh*3)+2], hh[(ldh*3)+2]);
    __SIMD_DATATYPE h_4_1 = _SIMD_SET(hh[(ldh*3)+3], hh[(ldh*3)+3]);
1525
1526
#endif

1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
#if VEC_SET == 256
    __SIMD_DATATYPE h_2_1 = _SIMD_BROADCAST(&hh[ldh+1]);
    __SIMD_DATATYPE h_3_2 = _SIMD_BROADCAST(&hh[(ldh*2)+1]);
    __SIMD_DATATYPE h_3_1 = _SIMD_BROADCAST(&hh[(ldh*2)+2]);
    __SIMD_DATATYPE h_4_3 = _SIMD_BROADCAST(&hh[(ldh*3)+1]);
    __SIMD_DATATYPE h_4_2 = _SIMD_BROADCAST(&hh[(ldh*3)+2]);
    __SIMD_DATATYPE h_4_1 = _SIMD_BROADCAST(&hh[(ldh*3)+3]);
#endif

#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w1 = _SIMD_FMA(a3_1, h_4_3, a4_1);
    w1 = _SIMD_FMA(a2_1, h_4_2, w1);
    w1 = _SIMD_FMA(a1_1, h_4_1, w1);
    register __SIMD_DATATYPE z1 = _SIMD_FMA(a2_1, h_3_2, a3_1);
    z1 = _SIMD_FMA(a1_1, h_3_1, z1);
    register __SIMD_DATATYPE y1 = _SIMD_FMA(a1_1, h_2_1, a2_1);
    register __SIMD_DATATYPE x1 = a1_1;
#else
1545
1546
1547
1548
1549
1550
1551
    register __SIMD_DATATYPE w1 = _SIMD_ADD(a4_1, _SIMD_MUL(a3_1, h_4_3));
    w1 = _SIMD_ADD(w1, _SIMD_MUL(a2_1, h_4_2));                          
    w1 = _SIMD_ADD(w1, _SIMD_MUL(a1_1, h_4_1));                          
    register __SIMD_DATATYPE z1 = _SIMD_ADD(a3_1, _SIMD_MUL(a2_1, h_3_2));
    z1 = _SIMD_ADD(z1, _SIMD_MUL(a1_1, h_3_1));                          
    register __SIMD_DATATYPE y1 = _SIMD_ADD(a2_1, _SIMD_MUL(a1_1, h_2_1));
    register __SIMD_DATATYPE x1 = a1_1;
1552
#endif /* __ELPA_USE_FMA__ */
1553
1554
1555
1556
1557
1558

    __SIMD_DATATYPE a1_2 = _SIMD_LOAD(&q[(ldq*3)+offset]);                  
    __SIMD_DATATYPE a2_2 = _SIMD_LOAD(&q[(ldq*2)+offset]);
    __SIMD_DATATYPE a3_2 = _SIMD_LOAD(&q[ldq+offset]);
    __SIMD_DATATYPE a4_2 = _SIMD_LOAD(&q[0+offset]);

1559
1560
1561
1562
1563
1564
1565
1566
1567
#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w2 = _SIMD_FMA(a3_2, h_4_3, a4_2);
    w2 = _SIMD_FMA(a2_2, h_4_2, w2);
    w2 = _SIMD_FMA(a1_2, h_4_1, w2);
    register __SIMD_DATATYPE z2 = _SIMD_FMA(a2_2, h_3_2, a3_2);
    z2 = _SIMD_FMA(a1_2, h_3_1, z2);
    register __SIMD_DATATYPE y2 = _SIMD_FMA(a1_2, h_2_1, a2_2);
    register __SIMD_DATATYPE x2 = a1_2;
#else
1568
1569
1570
1571
1572
1573
1574
    register __SIMD_DATATYPE w2 = _SIMD_ADD(a4_2, _SIMD_MUL(a3_2, h_4_3));
    w2 = _SIMD_ADD(w2, _SIMD_MUL(a2_2, h_4_2));
    w2 = _SIMD_ADD(w2, _SIMD_MUL(a1_2, h_4_1));
    register __SIMD_DATATYPE z2 = _SIMD_ADD(a3_2, _SIMD_MUL(a2_2, h_3_2));
    z2 = _SIMD_ADD(z2, _SIMD_MUL(a1_2, h_3_1));
    register __SIMD_DATATYPE y2 = _SIMD_ADD(a2_2, _SIMD_MUL(a1_2, h_2_1));
    register __SIMD_DATATYPE x2 = a1_2;
1575
#endif /* __ELPA_USE_FMA__ */
1576
1577
1578
1579
1580
1581

    __SIMD_DATATYPE a1_3 = _SIMD_LOAD(&q[(ldq*3)+2*offset]);
    __SIMD_DATATYPE a2_3 = _SIMD_LOAD(&q[(ldq*2)+2*offset]);
    __SIMD_DATATYPE a3_3 = _SIMD_LOAD(&q[ldq+2*offset]);
    __SIMD_DATATYPE a4_3 = _SIMD_LOAD(&q[0+2*offset]);

1582
1583
1584
1585
1586
1587
1588
1589
1590
#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w3 = _SIMD_FMA(a3_3, h_4_3, a4_3);
    w3 = _SIMD_FMA(a2_3, h_4_2, w3);
    w3 = _SIMD_FMA(a1_3, h_4_1, w3);
    register __SIMD_DATATYPE z3 = _SIMD_FMA(a2_3, h_3_2, a3_3);
    z3 = _SIMD_FMA(a1_3, h_3_1, z3);
    register __SIMD_DATATYPE y3 = _SIMD_FMA(a1_3, h_2_1, a2_3);
    register __SIMD_DATATYPE x3 = a1_3;
#else
1591
1592
1593
1594
1595
1596
1597
    register __SIMD_DATATYPE w3 = _SIMD_ADD(a4_3, _SIMD_MUL(a3_3, h_4_3));
    w3 = _SIMD_ADD(w3, _SIMD_MUL(a2_3, h_4_2));
    w3 = _SIMD_ADD(w3, _SIMD_MUL(a1_3, h_4_1));
    register __SIMD_DATATYPE z3 = _SIMD_ADD(a3_3, _SIMD_MUL(a2_3, h_3_2));
    z3 = _SIMD_ADD(z3, _SIMD_MUL(a1_3, h_3_1));
    register __SIMD_DATATYPE y3 = _SIMD_ADD(a2_3, _SIMD_MUL(a1_3, h_2_1));
    register __SIMD_DATATYPE x3 = a1_3;
1598
#endif /* __ELPA_USE_FMA__ */
1599
1600
1601
1602
1603
1604

    __SIMD_DATATYPE a1_4 = _SIMD_LOAD(&q[(ldq*3)+3*offset]);
    __SIMD_DATATYPE a2_4 = _SIMD_LOAD(&q[(ldq*2)+3*offset]);
    __SIMD_DATATYPE a3_4 = _SIMD_LOAD(&q[ldq+3*offset]);
    __SIMD_DATATYPE a4_4 = _SIMD_LOAD(&q[0+3*offset]);

1605
1606
1607
1608
1609
1610
1611
1612
1613
#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w4 = _SIMD_FMA(a3_4, h_4_3, a4_4);
    w4 = _SIMD_FMA(a2_4, h_4_2, w4);
    w4 = _SIMD_FMA(a1_4, h_4_1, w4);
    register __SIMD_DATATYPE z4 = _SIMD_FMA(a2_4, h_3_2, a3_4);
    z4 = _SIMD_FMA(a1_4, h_3_1, z4);
    register __SIMD_DATATYPE y4 = _SIMD_FMA(a1_4, h_2_1, a2_4);
    register __SIMD_DATATYPE x4 = a1_4;
#else
1614
1615
1616
1617
1618
1619
1620
    register __SIMD_DATATYPE w4 = _SIMD_ADD(a4_4, _SIMD_MUL(a3_4, h_4_3));
    w4 = _SIMD_ADD(w4, _SIMD_MUL(a2_4, h_4_2));
    w4 = _SIMD_ADD(w4, _SIMD_MUL(a1_4, h_4_1));
    register __SIMD_DATATYPE z4 = _SIMD_ADD(a3_4, _SIMD_MUL(a2_4, h_3_2));
    z4 = _SIMD_ADD(z4, _SIMD_MUL(a1_4, h_3_1));
    register __SIMD_DATATYPE y4 = _SIMD_ADD(a2_4, _SIMD_MUL(a1_4, h_2_1));
    register __SIMD_DATATYPE x4 = a1_4;
1621
#endif /* __ELPA_USE_FMA__ */
1622
1623
1624
1625
1626
1627

    __SIMD_DATATYPE a1_5 = _SIMD_LOAD(&q[(ldq*3)+4*offset]);
    __SIMD_DATATYPE a2_5 = _SIMD_LOAD(&q[(ldq*2)+4*offset]);
    __SIMD_DATATYPE a3_5 = _SIMD_LOAD(&q[ldq+4*offset]);
    __SIMD_DATATYPE a4_5 = _SIMD_LOAD(&q[0+4*offset]);

1628
1629
1630
1631
1632
1633
1634
1635
1636
#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w5 = _SIMD_FMA(a3_5, h_4_3, a4_5);
    w5 = _SIMD_FMA(a2_5, h_4_2, w5);
    w5 = _SIMD_FMA(a1_5, h_4_1, w5);
    register __SIMD_DATATYPE z5 = _SIMD_FMA(a2_5, h_3_2, a3_5);
    z5 = _SIMD_FMA(a1_5, h_3_1, z5);
    register __SIMD_DATATYPE y5 = _SIMD_FMA(a1_5, h_2_1, a2_5);
    register __SIMD_DATATYPE x5 = a1_5;
#else
1637
1638
1639
1640
1641
1642
1643
    register __SIMD_DATATYPE w5 = _SIMD_ADD(a4_5, _SIMD_MUL(a3_5, h_4_3));
    w5 = _SIMD_ADD(w5, _SIMD_MUL(a2_5, h_4_2));
    w5 = _SIMD_ADD(w5, _SIMD_MUL(a1_5, h_4_1));
    register __SIMD_DATATYPE z5 = _SIMD_ADD(a3_5, _SIMD_MUL(a2_5, h_3_2));
    z5 = _SIMD_ADD(z5, _SIMD_MUL(a1_5, h_3_1));
    register __SIMD_DATATYPE y5 = _SIMD_ADD(a2_5, _SIMD_MUL(a1_5, h_2_1));
    register __SIMD_DATATYPE x5 = a1_5;
1644
#endif /* __ELPA_USE_FMA__ */
1645
1646
1647
1648
1649
1650

    __SIMD_DATATYPE a1_6 = _SIMD_LOAD(&q[(ldq*3)+5*offset]);
    __SIMD_DATATYPE a2_6 = _SIMD_LOAD(&q[(ldq*2)+5*offset]);
    __SIMD_DATATYPE a3_6 = _SIMD_LOAD(&q[ldq+5*offset]);
    __SIMD_DATATYPE a4_6 = _SIMD_LOAD(&q[0+5*offset]);

1651
1652
1653
1654
1655
1656
1657
1658
1659
#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w6 = _SIMD_FMA(a3_6, h_4_3, a4_6);
    w6 = _SIMD_FMA(a2_6, h_4_2, w6);
    w6 = _SIMD_FMA(a1_6, h_4_1, w6);
    register __SIMD_DATATYPE z6 = _SIMD_FMA(a2_6, h_3_2, a3_6);
    z6 = _SIMD_FMA(a1_6, h_3_1, z6);
    register __SIMD_DATATYPE y6 = _SIMD_FMA(a1_6, h_2_1, a2_6);
    register __SIMD_DATATYPE x6 = a1_6;
#else
1660
1661
1662
1663
1664
1665
1666
    register __SIMD_DATATYPE w6 = _SIMD_ADD(a4_6, _SIMD_MUL(a3_6, h_4_3));
    w6 = _SIMD_ADD(w6, _SIMD_MUL(a2_6, h_4_2));
    w6 = _SIMD_ADD(w6, _SIMD_MUL(a1_6, h_4_1));
    register __SIMD_DATATYPE z6 = _SIMD_ADD(a3_6, _SIMD_MUL(a2_6, h_3_2));
    z6 = _SIMD_ADD(z6, _SIMD_MUL(a1_6, h_3_1));
    register __SIMD_DATATYPE y6 = _SIMD_ADD(a2_6, _SIMD_MUL(a1_6, h_2_1));
    register __SIMD_DATATYPE x6 = a1_6;
1667
#endif /* __ELPA_USE_FMA__ */
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679

    __SIMD_DATATYPE q1;
    __SIMD_DATATYPE q2;
    __SIMD_DATATYPE q3;
    __SIMD_DATATYPE q4;
    __SIMD_DATATYPE q5;
    __SIMD_DATATYPE q6;

    __SIMD_DATATYPE h1;
    __SIMD_DATATYPE h2;
    __SIMD_DATATYPE h3;
    __SIMD_DATATYPE h4;
1680
1681
#endif /* BLOCK4 */

1682
1683
#ifdef BLOCK6
    
1684
1685
1686
1687
1688
1689
1690
1691
    __SIMD_DATATYPE a1_1 = _SIMD_LOAD(&q[ldq*5]);
    __SIMD_DATATYPE a2_1 = _SIMD_LOAD(&q[ldq*4]);
    __SIMD_DATATYPE a3_1 = _SIMD_LOAD(&q[ldq*3]);
    __SIMD_DATATYPE a4_1 = _SIMD_LOAD(&q[ldq*2]);
    __SIMD_DATATYPE a5_1 = _SIMD_LOAD(&q[ldq]);  
    __SIMD_DATATYPE a6_1 = _SIMD_LOAD(&q[0]);    

#if VEC_SET == 128
1692
1693
1694
1695
1696
    __SIMD_DATATYPE h_6_5 = _SIMD_SET1(hh[(ldh*5)+1]);
    __SIMD_DATATYPE h_6_4 = _SIMD_SET1(hh[(ldh*5)+2]);
    __SIMD_DATATYPE h_6_3 = _SIMD_SET1(hh[(ldh*5)+3]);
    __SIMD_DATATYPE h_6_2 = _SIMD_SET1(hh[(ldh*5)+4]);
    __SIMD_DATATYPE h_6_1 = _SIMD_SET1(hh[(ldh*5)+5]);
1697
1698
1699
#endif

#if VEC_SET == 1281
1700
1701
1702
1703
1704
    __SIMD_DATATYPE h_6_5 = _SIMD_SET(hh[(ldh*5)+1], hh[(ldh*5)+1]);
    __SIMD_DATATYPE h_6_4 = _SIMD_SET(hh[(ldh*5)+2], hh[(ldh*5)+2]);
    __SIMD_DATATYPE h_6_3 = _SIMD_SET(hh[(ldh*5)+3], hh[(ldh*5)+3]);
    __SIMD_DATATYPE h_6_2 = _SIMD_SET(hh[(ldh*5)+4], hh[(ldh*5)+4]);
    __SIMD_DATATYPE h_6_1 = _SIMD_SET(hh[(ldh*5)+5], hh[(ldh*5)+5]);
1705
1706
#endif

1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
#if VEC_SET == 256
    __SIMD_DATATYPE h_6_5 = _SIMD_BROADCAST(&hh[(ldh*5)+1]);
    __SIMD_DATATYPE h_6_4 = _SIMD_BROADCAST(&hh[(ldh*5)+2]);
    __SIMD_DATATYPE h_6_3 = _SIMD_BROADCAST(&hh[(ldh*5)+3]);
    __SIMD_DATATYPE h_6_2 = _SIMD_BROADCAST(&hh[(ldh*5)+4]);
    __SIMD_DATATYPE h_6_1 = _SIMD_BROADCAST(&hh[(ldh*5)+5]);
#endif

#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE t1 = _SIMD_FMA(a5_1, h_6_5, a6_1);
    t1 = _SIMD_FMA(a4_1, h_6_4, t1);
    t1 = _SIMD_FMA(a3_1, h_6_3, t1);
    t1 = _SIMD_FMA(a2_1, h_6_2, t1);
    t1 = _SIMD_FMA(a1_1, h_6_1, t1);
#else
1722
1723
1724
1725
1726
    register __SIMD_DATATYPE t1 = _SIMD_ADD(a6_1, _SIMD_MUL(a5_1, h_6_5)); 
    t1 = _SIMD_ADD(t1, _SIMD_MUL(a4_1, h_6_4));
    t1 = _SIMD_ADD(t1, _SIMD_MUL(a3_1, h_6_3));
    t1 = _SIMD_ADD(t1, _SIMD_MUL(a2_1, h_6_2));
    t1 = _SIMD_ADD(t1, _SIMD_MUL(a1_1, h_6_1));
1727
#endif /* __ELPA_USE_FMA__ */
1728
1729

#if VEC_SET == 128
1730
1731
1732
1733
    __SIMD_DATATYPE h_5_4 = _SIMD_SET1(hh[(ldh*4)+1]);
    __SIMD_DATATYPE h_5_3 = _SIMD_SET1(hh[(ldh*4)+2]);
    __SIMD_DATATYPE h_5_2 = _SIMD_SET1(hh[(ldh*4)+3]);
    __SIMD_DATATYPE h_5_1 = _SIMD_SET1(hh[(ldh*4)+4]);
1734
1735
1736
#endif

#if VEC_SET == 1281
1737
1738
1739
1740
    __SIMD_DATATYPE h_5_4 = _SIMD_SET(hh[(ldh*4)+1], hh[(ldh*4)+1]);
    __SIMD_DATATYPE h_5_3 = _SIMD_SET(hh[(ldh*4)+2], hh[(ldh*4)+2]);
    __SIMD_DATATYPE h_5_2 = _SIMD_SET(hh[(ldh*4)+3], hh[(ldh*4)+3]);
    __SIMD_DATATYPE h_5_1 = _SIMD_SET(hh[(ldh*4)+4], hh[(ldh*4)+4]);
1741
1742
#endif

1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
#if VEC_SET == 256
    __SIMD_DATATYPE h_5_4 = _SIMD_BROADCAST(&hh[(ldh*4)+1]);
    __SIMD_DATATYPE h_5_3 = _SIMD_BROADCAST(&hh[(ldh*4)+2]);
    __SIMD_DATATYPE h_5_2 = _SIMD_BROADCAST(&hh[(ldh*4)+3]);
    __SIMD_DATATYPE h_5_1 = _SIMD_BROADCAST(&hh[(ldh*4)+4]);
#endif

#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE v1 = _SIMD_FMA(a4_1, h_5_4, a5_1);
    v1 = _SIMD_FMA(a3_1, h_5_3, v1);
    v1 = _SIMD_FMA(a2_1, h_5_2, v1);
    v1 = _SIMD_FMA(a1_1, h_5_1, v1);
#else
1756
1757
1758
1759
    register __SIMD_DATATYPE v1 = _SIMD_ADD(a5_1, _SIMD_MUL(a4_1, h_5_4)); 
    v1 = _SIMD_ADD(v1, _SIMD_MUL(a3_1, h_5_3));
    v1 = _SIMD_ADD(v1, _SIMD_MUL(a2_1, h_5_2));
    v1 = _SIMD_ADD(v1, _SIMD_MUL(a1_1, h_5_1));
1760
#endif /* __ELPA_USE_FMA__ */
1761
1762

#if VEC_SET == 128
1763
1764
1765
    __SIMD_DATATYPE h_4_3 = _SIMD_SET1(hh[(ldh*3)+1]);
    __SIMD_DATATYPE h_4_2 = _SIMD_SET1(hh[(ldh*3)+2]);
    __SIMD_DATATYPE h_4_1 = _SIMD_SET1(hh[(ldh*3)+3]);
1766
1767
1768
#endif

#if VEC_SET == 1281
1769
1770
1771
    __SIMD_DATATYPE h_4_3 = _SIMD_SET(hh[(ldh*3)+1], hh[(ldh*3)+1]);
    __SIMD_DATATYPE h_4_2 = _SIMD_SET(hh[(ldh*3)+2], hh[(ldh*3)+2]);
    __SIMD_DATATYPE h_4_1 = _SIMD_SET(hh[(ldh*3)+3], hh[(ldh*3)+3]);
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#endif

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#if VEC_SET == 256
    __SIMD_DATATYPE h_4_3 = _SIMD_BROADCAST(&hh[(ldh*3)+1]);
    __SIMD_DATATYPE h_4_2 = _SIMD_BROADCAST(&hh[(ldh*3)+2]);
    __SIMD_DATATYPE h_4_1 = _SIMD_BROADCAST(&hh[(ldh*3)+3]);
#endif

#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w1 = _SIMD_FMA(a3_1, h_4_3, a4_1);
    w1 = _SIMD_FMA(a2_1, h_4_2, w1);
    w1 = _SIMD_FMA(a1_1, h_4_1, w1);
#else
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    register __SIMD_DATATYPE w1 = _SIMD_ADD(a4_1, _SIMD_MUL(a3_1, h_4_3)); 
    w1 = _SIMD_ADD(w1, _SIMD_MUL(a2_1, h_4_2));
    w1 = _SIMD_ADD(w1, _SIMD_MUL(a1_1, h_4_1));
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#endif /* __ELPA_USE_FMA__ */