real_128bit_BLOCK_template.c 383 KB
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//    This file is part of ELPA.
//
//    The ELPA library was originally created by the ELPA consortium,
//    consisting of the following organizations:
//
//    - Max Planck Computing and Data Facility (MPCDF), formerly known as
//      Rechenzentrum Garching der Max-Planck-Gesellschaft (RZG),
//    - Bergische Universität Wuppertal, Lehrstuhl für angewandte
//      Informatik,
//    - Technische Universität München, Lehrstuhl für Informatik mit
//      Schwerpunkt Wissenschaftliches Rechnen ,
//    - Fritz-Haber-Institut, Berlin, Abt. Theorie,
//    - Max-Plack-Institut für Mathematik in den Naturwissenschaften,
//      Leipzig, Abt. Komplexe Strukutren in Biologie und Kognition,
//      and
//    - IBM Deutschland GmbH
//
//    This particular source code file contains additions, changes and
//    enhancements authored by Intel Corporation which is not part of
//    the ELPA consortium.
//
//    More information can be found here:
//    http://elpa.mpcdf.mpg.de/
//
//    ELPA is free software: you can redistribute it and/or modify
//    it under the terms of the version 3 of the license of the
//    GNU Lesser General Public License as published by the Free
//    Software Foundation.
//
//    ELPA is distributed in the hope that it will be useful,
//    but WITHOUT ANY WARRANTY; without even the implied warranty of
//    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
//    GNU Lesser General Public License for more details.
//
//    You should have received a copy of the GNU Lesser General Public License
//    along with ELPA. If not, see <http://www.gnu.org/licenses/>
//
//    ELPA reflects a substantial effort on the part of the original
//    ELPA consortium, and we ask you to respect the spirit of the
//    license that we chose: i.e., please contribute any changes you
//    may have back to the original ELPA library distribution, and keep
//    any derivatives of ELPA under the same license that we chose for
//    the original distribution, the GNU Lesser General Public License.
//
// Author: Andreas Marek, MPCDF, based on the double precision case of A. Heinecke
//
#include "config-f90.h"

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#define CONCAT_8ARGS(a, b, c, d, e, f, g, h) CONCAT2_8ARGS(a, b, c, d, e, f, g, h)
#define CONCAT2_8ARGS(a, b, c, d, e, f, g, h) a ## b ## c ## d ## e ## f ## g ## h

#define CONCAT_7ARGS(a, b, c, d, e, f, g) CONCAT2_7ARGS(a, b, c, d, e, f, g)
#define CONCAT2_7ARGS(a, b, c, d, e, f, g) a ## b ## c ## d ## e ## f ## g

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#define CONCAT_6ARGS(a, b, c, d, e, f) CONCAT2_6ARGS(a, b, c, d, e, f)
#define CONCAT2_6ARGS(a, b, c, d, e, f) a ## b ## c ## d ## e ## f

#define CONCAT_5ARGS(a, b, c, d, e) CONCAT2_5ARGS(a, b, c, d, e)
#define CONCAT2_5ARGS(a, b, c, d, e) a ## b ## c ## d ## e

#define CONCAT_4ARGS(a, b, c, d) CONCAT2_4ARGS(a, b, c, d)
#define CONCAT2_4ARGS(a, b, c, d) a ## b ## c ## d

#define CONCAT_3ARGS(a, b, c) CONCAT2_3ARGS(a, b, c)
#define CONCAT2_3ARGS(a, b, c) a ## b ## c

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#if VEC_SET == 128 || VEC_SET == 256
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#include <x86intrin.h>
#endif
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#if VEC_SET == 1281
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#include <fjmfunc.h>
#include <emmintrin.h>
#endif
#include <stdio.h>
#include <stdlib.h>

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#ifdef BLOCK6
#define PREFIX hexa
#define BLOCK 6
#endif

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#ifdef BLOCK4
#define PREFIX quad
#define BLOCK 4
#endif

#ifdef BLOCK2
#define PREFIX double
#define BLOCK 2
#endif

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#if VEC_SET == 128
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#define SIMD_SET SSE
#endif

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#if VEC_SET == 1281
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#define SIMD_SET SPARC64
#endif
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#if VEC_SET == 256
#define SIMD_SET AVX_AVX2
#endif

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#define __forceinline __attribute__((always_inline)) static

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#if VEC_SET == 128 || VEC_SET == 1281
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#ifdef DOUBLE_PRECISION_REAL
#define offset 2
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#define __SIMD_DATATYPE __m128d
#define _SIMD_LOAD _mm_load_pd
#define _SIMD_STORE _mm_store_pd
#define _SIMD_ADD _mm_add_pd
#define _SIMD_MUL _mm_mul_pd
#define _SIMD_SUB _mm_sub_pd
#define _SIMD_XOR _mm_xor_pd
#endif
#ifdef SINGLE_PRECISION_REAL
#define offset 4
#define __SIMD_DATATYPE __m128
#define _SIMD_LOAD _mm_load_ps
#define _SIMD_STORE _mm_store_ps
#define _SIMD_ADD _mm_add_ps
#define _SIMD_MUL _mm_mul_ps
#define _SIMD_SUB _mm_sub_ps
#define _SIMD_XOR _mm_xor_ps
#endif
#endif /* VEC_SET == 128 || VEC_SET == 1281 */
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#if VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define offset 4
#define __SIMD_DATATYPE __m256d
#define _SIMD_LOAD _mm256_load_pd
#define _SIMD_STORE _mm256_store_pd
#define _SIMD_ADD _mm256_add_pd
#define _SIMD_MUL _mm256_mul_pd
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#define _SIMD_SUB _mm256_sub_pd
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#define _SIMD_XOR _mm256_xor_pd
#define _SIMD_BROADCAST _mm256_broadcast_sd
#ifdef HAVE_AVX2
#ifdef __FMA4__
#define __ELPA_USE_FMA__
#define _mm256_FMA_pd(a,b,c) _mm256_macc_pd(a,b,c)
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#define _mm256_NFMA_pd(a,b,c) _mm256_nmacc_pd(a,b,c)
#error "This should be prop _mm256_msub_pd instead of _mm256_msub"
#define _mm256_FMSUB_pd(a,b,c) _mm256_msub(a,b,c)
#endif /* __FMA4__ */
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#ifdef __AVX2__
#define __ELPA_USE_FMA__
#define _mm256_FMA_pd(a,b,c) _mm256_fmadd_pd(a,b,c)
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#define _mm256_NFMA_pd(a,b,c) _mm256_fnmadd_pd(a,b,c)
#define _mm256_FMSUB_pd(a,b,c) _mm256_fmsub_pd(a,b,c)
#endif /* __AVX2__ */
#ifdef __ELPA_USE_FMA__
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#define _SIMD_FMA _mm256_FMA_pd
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#define _SIMD_NFMA _mm256_NFMA_pd
#define _SIMD_FMSUB _mm256_FMSUB_pd
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#endif
#endif /* HAVE_AVX2 */
#endif /* DOUBLE_PRECISION_REAL */

#ifdef SINGLE_PRECISION_REAL
#define offset 8
#define __SIMD_DATATYPE __m256
#define _SIMD_LOAD _mm256_load_ps
#define _SIMD_STORE _mm256_store_ps
#define _SIMD_ADD _mm256_add_ps
#define _SIMD_MUL _mm256_mul_ps
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#define _SIMD_SUB _mm256_sub_ps
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#define _SIMD_XOR _mm256_xor_ps
#define _SIMD_BROADCAST _mm256_broadcast_ss
#ifdef HAVE_AVX2
#ifdef __FMA4__
#define __ELPA_USE_FMA__
#define _mm256_FMA_ps(a,b,c) _mm256_macc_ps(a,b,c)
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#define _mm256_NFMA_ps(a,b,c) _mm256_nmacc_ps(a,b,c)
#error "This should be prop _mm256_msub_ps instead of _mm256_msub"
#define _mm256_FMSUB_ps(a,b,c) _mm256_msub(a,b,c)
#endif /* __FMA4__ */
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#ifdef __AVX2__
#define __ELPA_USE_FMA__
#define _mm256_FMA_ps(a,b,c) _mm256_fmadd_ps(a,b,c)
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#define _mm256_NFMA_ps(a,b,c) _mm256_fnmadd_ps(a,b,c)
#define _mm256_FMSUB_ps(a,b,c) _mm256_fmsub_ps(a,b,c)
#endif /* __AVX2__ */
#ifdef __ELPA_USE_FMA__
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#define _SIMD_FMA _mm256_FMA_ps
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#define _SIMD_NFMA _mm256_NFMA_ps
#define _SIMD_FMSUB _mm256_FMSUB_ps
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#endif
#endif /* HAVE_AVX2 */
#endif /* SINGLE_PRECISION_REAL */
#endif /* VEC_SET == 256 */

#ifdef DOUBLE_PRECISION_REAL
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#define WORD_LENGTH double
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#define DATA_TYPE double
#define DATA_TYPE_PTR double*
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#endif
#ifdef SINGLE_PRECISION_REAL
#define WORD_LENGTH single
#define DATA_TYPE float
#define DATA_TYPE_PTR float*
#endif


#ifdef DOUBLE_PRECISION_REAL

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#define _SSE_SET _mm_set_pd
#define _SSE_SET1 _mm_set1_pd
#define _SSE_SET _mm_set_pd
#endif

#ifdef SINGLE_PRECISION_REAL

#define _SSE_SET _mm_set_ps
#define _SSE_SET1 _mm_set1_ps
#define _SSE_SET _mm_set_ps

#endif

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#if VEC_SET == 128
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#undef __AVX__
#endif

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#if VEC_SET == 128 || VEC_SET == 1281
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//Forward declaration
#ifdef DOUBLE_PRECISION_REAL
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#undef ROW_LENGTH
#define ROW_LENGTH 2
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#endif
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#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 4
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#endif
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#endif /* VEC_SET == 128 || VEC_SET == 1281 */
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#if VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 4
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 8
#endif
#endif /* VEC_SET == 256 */
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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh, 
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#ifdef BLOCK2
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	DATA_TYPE s);
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#endif
#ifdef BLOCK4
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	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
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#endif
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#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
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#endif
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#if VEC_SET == 128 || VEC_SET == 1281
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#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 4
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#endif
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#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 8
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#endif
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#endif /* VEC_SET == 128 || VEC_SET == 1281 */

#if VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 8
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 16
#endif
#endif /* VEC_SET == 256 */
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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh, 
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#ifdef BLOCK2
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	DATA_TYPE s);
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#endif
#ifdef BLOCK4
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	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
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#endif
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#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
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#endif
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#if VEC_SET == 128 || VEC_SET == 1281 
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#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 6
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#endif
#ifdef SINGLE_PRECISION_REAL
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#undef ROW_LENGTH
#define ROW_LENGTH 12
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#endif
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#endif /* VEC_SET == 128 || VEC_SET == 1281  */

#if VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 12
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 24
#endif
#endif /* VEC_SET == 256 */

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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh,
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#ifdef BLOCK2
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	DATA_TYPE s);
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#endif
#ifdef BLOCK4
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	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
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#endif
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#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
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#endif
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#if VEC_SET == 128 || VEC_SET == 1281 
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#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 8
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#endif
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#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 16
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#endif
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#endif /* VEC_SET == 128 || VEC_SET == 1281  */

#if VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 16
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 32
#endif
#endif /* VEC_SET == 256 */

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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh, 
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#ifdef BLOCK2
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	DATA_TYPE s);
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#endif
#ifdef BLOCK4
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	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
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#endif
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#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
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#endif
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#if  VEC_SET == 128 || VEC_SET == 1281
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#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 10
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#endif
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#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 20
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#endif
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#endif /*  VEC_SET == 128 || VEC_SET == 1281 */

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 20
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 40
#endif
#endif /*  VEC_SET == 256 */


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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh, 
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#ifdef BLOCK2
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	DATA_TYPE s);
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#endif
#ifdef BLOCK4
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	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
#endif
#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
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#endif

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#if  VEC_SET == 128 || VEC_SET == 1281
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#ifdef DOUBLE_PRECISION_REAL
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#undef ROW_LENGTH
#define ROW_LENGTH 12
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#endif
#ifdef SINGLE_PRECISION_REAL
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#undef ROW_LENGTH
#define ROW_LENGTH 24
#endif
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#endif /* VEC_SET == 128 || VEC_SET == 1281 */

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 24
#endif
#ifdef SINGLE_PRECISION_REAL
#undef ROW_LENGTH
#define ROW_LENGTH 48
#endif
#endif /*  VEC_SET == 256 */
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__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh,
#ifdef BLOCK2
	DATA_TYPE s);
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#endif
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#ifdef BLOCK4
	DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4);
#endif
#ifdef BLOCK6
	DATA_TYPE_PTR scalarprods);
#endif

void CONCAT_7ARGS(PREFIX,_hh_trafo_real_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int* pnb, int* pnq, int* pldq, int* pldh);
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/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine double_hh_trafo_real_SSE_2hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="double_hh_trafo_real_SSE_2hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine double_hh_trafo_real_SSE_2hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="double_hh_trafo_real_SSE_2hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_float)  :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine double_hh_trafo_real_SPARC64_2hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="double_hh_trafo_real_SPARC64_2hv_double")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_double) :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine double_hh_trafo_real_SPARC64_2hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="double_hh_trafo_real_SPARC64_2hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_float)  :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

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/*
!f>#if defined(HAVE_AVX) || defined(HAVE_AVX2)
!f> interface
!f>   subroutine double_hh_trafo_real_AVX_AVX2_2hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="double_hh_trafo_real_AVX_AVX2_2hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

/*
!f>#if defined(HAVE_AVX) || defined(HAVE_AVX2)
!f> interface
!f>   subroutine double_hh_trafo_real_AVX_AVX2_2hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="double_hh_trafo_real_AVX_AVX2_2hv_single")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)       :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_float)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

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/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine quad_hh_trafo_real_SSE_4hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="quad_hh_trafo_real_SSE_4hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine quad_hh_trafo_real_SSE_4hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="quad_hh_trafo_real_SSE_4hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_float)  :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine quad_hh_trafo_real_SPARC64_4hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="quad_hh_trafo_real_SPARC64_4hv_double")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_double) :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine quad_hh_trafo_real_SPARC64_4hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="quad_hh_trafo_real_SPARC64_4hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_float)  :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
565 566 567 568 569 570 571 572 573 574 575 576 577 578 579 580 581 582 583 584 585 586 587 588 589 590 591 592

/*
!f>#if defined(HAVE_AVX) || defined(HAVE_AVX2)
!f> interface
!f>   subroutine quad_hh_trafo_real_AVX_AVX2_4hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="quad_hh_trafo_real_AVX_AVX2_4hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#if defined(HAVE_AVX) || defined(HAVE_AVX2)
!f> interface
!f>   subroutine quad_hh_trafo_real_AVX_AVX2_4hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>              bind(C, name="quad_hh_trafo_real_AVX_AVX2_4hv_single")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int) :: pnb, pnq, pldq, pldh
!f>     type(c_ptr), value  :: q
!f>     real(kind=c_float)  :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

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/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine hexa_hh_trafo_real_sse_6hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="hexa_hh_trafo_real_SSE_6hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine hexa_hh_trafo_real_sparc64_6hv_double(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="hexa_hh_trafo_real_SPARC64_6hv_double")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_double)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#ifdef HAVE_SSE_INTRINSICS
!f> interface
!f>   subroutine hexa_hh_trafo_real_sse_6hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="hexa_hh_trafo_real_SSE_6hv_single")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_float)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/
/*
!f>#ifdef HAVE_SPARC64_SSE
!f> interface
!f>   subroutine hexa_hh_trafo_real_sparc64_6hv_single(q, hh, pnb, pnq, pldq, pldh) &
!f>                                bind(C, name="hexa_hh_trafo_real_SPARC64_6hv_single")
!f>        use, intrinsic :: iso_c_binding
!f>        integer(kind=c_int)        :: pnb, pnq, pldq, pldh
!f>        type(c_ptr), value        :: q
!f>        real(kind=c_float)        :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

void CONCAT_7ARGS(PREFIX,_hh_trafo_real_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int* pnb, int* pnq, int* pldq, int* pldh)
647 648 649 650 651 652 653 654
{
  int i;
  int nb = *pnb;
  int nq = *pldq;
  int ldq = *pldq;
  int ldh = *pldh;
  int worked_on;

655 656
  worked_on = 0;

657 658 659
#ifdef BLOCK2
  // calculating scalar product to compute
  // 2 householder vectors simultaneously
660
  DATA_TYPE s = hh[(ldh)+1]*1.0;
661 662 663 664 665
#endif

#ifdef BLOCK4
  // calculating scalar products to compute
  // 4 householder vectors simultaneously
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  DATA_TYPE s_1_2 = hh[(ldh)+1];  
  DATA_TYPE s_1_3 = hh[(ldh*2)+2];
  DATA_TYPE s_2_3 = hh[(ldh*2)+1];
  DATA_TYPE s_1_4 = hh[(ldh*3)+3];
  DATA_TYPE s_2_4 = hh[(ldh*3)+2];
  DATA_TYPE s_3_4 = hh[(ldh*3)+1];

673 674
  // calculate scalar product of first and fourth householder Vector
  // loop counter = 2
675 676 677
  s_1_2 += hh[2-1] * hh[(2+ldh)];          
  s_2_3 += hh[(ldh)+2-1] * hh[2+(ldh*2)];  
  s_3_4 += hh[(ldh*2)+2-1] * hh[2+(ldh*3)];
678 679

  // loop counter = 3
680 681 682
  s_1_2 += hh[3-1] * hh[(3+ldh)];          
  s_2_3 += hh[(ldh)+3-1] * hh[3+(ldh*2)];  
  s_3_4 += hh[(ldh*2)+3-1] * hh[3+(ldh*3)];
683

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  s_1_3 += hh[3-2] * hh[3+(ldh*2)];        
  s_2_4 += hh[(ldh*1)+3-2] * hh[3+(ldh*3)];
#endif /* BLOCK4 */

#ifdef BLOCK6
  // calculating scalar products to compute
  // 6 householder vectors simultaneously
  DATA_TYPE scalarprods[15];

  scalarprods[0] = hh[(ldh+1)];  
  scalarprods[1] = hh[(ldh*2)+2];
  scalarprods[2] = hh[(ldh*2)+1];
  scalarprods[3] = hh[(ldh*3)+3];
  scalarprods[4] = hh[(ldh*3)+2];
  scalarprods[5] = hh[(ldh*3)+1];
  scalarprods[6] = hh[(ldh*4)+4];
  scalarprods[7] = hh[(ldh*4)+3];
  scalarprods[8] = hh[(ldh*4)+2];
  scalarprods[9] = hh[(ldh*4)+1];
  scalarprods[10] = hh[(ldh*5)+5];
  scalarprods[11] = hh[(ldh*5)+4];
  scalarprods[12] = hh[(ldh*5)+3];
  scalarprods[13] = hh[(ldh*5)+2];
  scalarprods[14] = hh[(ldh*5)+1];

  // calculate scalar product of first and fourth householder Vector
  // loop counter = 2
  scalarprods[0] += hh[1] * hh[(2+ldh)];           
  scalarprods[2] += hh[(ldh)+1] * hh[2+(ldh*2)];   
  scalarprods[5] += hh[(ldh*2)+1] * hh[2+(ldh*3)]; 
  scalarprods[9] += hh[(ldh*3)+1] * hh[2+(ldh*4)]; 
  scalarprods[14] += hh[(ldh*4)+1] * hh[2+(ldh*5)];

  // loop counter = 3
  scalarprods[0] += hh[2] * hh[(3+ldh)];          
  scalarprods[2] += hh[(ldh)+2] * hh[3+(ldh*2)];  
  scalarprods[5] += hh[(ldh*2)+2] * hh[3+(ldh*3)];
  scalarprods[9] += hh[(ldh*3)+2] * hh[3+(ldh*4)];
  scalarprods[14] += hh[(ldh*4)+2] * hh[3+(ldh*5)];

  scalarprods[1] += hh[1] * hh[3+(ldh*2)];         
  scalarprods[4] += hh[(ldh*1)+1] * hh[3+(ldh*3)]; 
  scalarprods[8] += hh[(ldh*2)+1] * hh[3+(ldh*4)]; 
  scalarprods[13] += hh[(ldh*3)+1] * hh[3+(ldh*5)];

  // loop counter = 4
  scalarprods[0] += hh[3] * hh[(4+ldh)];           
  scalarprods[2] += hh[(ldh)+3] * hh[4+(ldh*2)];   
  scalarprods[5] += hh[(ldh*2)+3] * hh[4+(ldh*3)]; 
  scalarprods[9] += hh[(ldh*3)+3] * hh[4+(ldh*4)]; 
  scalarprods[14] += hh[(ldh*4)+3] * hh[4+(ldh*5)];

  scalarprods[1] += hh[2] * hh[4+(ldh*2)];         
  scalarprods[4] += hh[(ldh*1)+2] * hh[4+(ldh*3)]; 
  scalarprods[8] += hh[(ldh*2)+2] * hh[4+(ldh*4)]; 
  scalarprods[13] += hh[(ldh*3)+2] * hh[4+(ldh*5)];

  scalarprods[3] += hh[1] * hh[4+(ldh*3)];         
  scalarprods[7] += hh[(ldh)+1] * hh[4+(ldh*4)];   
  scalarprods[12] += hh[(ldh*2)+1] * hh[4+(ldh*5)];

  // loop counter = 5
  scalarprods[0] += hh[4] * hh[(5+ldh)];           
  scalarprods[2] += hh[(ldh)+4] * hh[5+(ldh*2)];   
  scalarprods[5] += hh[(ldh*2)+4] * hh[5+(ldh*3)]; 
  scalarprods[9] += hh[(ldh*3)+4] * hh[5+(ldh*4)]; 
  scalarprods[14] += hh[(ldh*4)+4] * hh[5+(ldh*5)];

  scalarprods[1] += hh[3] * hh[5+(ldh*2)];         
  scalarprods[4] += hh[(ldh*1)+3] * hh[5+(ldh*3)]; 
  scalarprods[8] += hh[(ldh*2)+3] * hh[5+(ldh*4)]; 
  scalarprods[13] += hh[(ldh*3)+3] * hh[5+(ldh*5)];

  scalarprods[3] += hh[2] * hh[5+(ldh*3)];         
  scalarprods[7] += hh[(ldh)+2] * hh[5+(ldh*4)];   
  scalarprods[12] += hh[(ldh*2)+2] * hh[5+(ldh*5)];

  scalarprods[6] += hh[1] * hh[5+(ldh*4)];         
  scalarprods[11] += hh[(ldh)+1] * hh[5+(ldh*5)];  


#endif /* BLOCK6 */
766

767
#if VEC_SET == 128 || VEC_SET == 256
768 769 770 771 772 773 774 775
  #pragma ivdep
#endif
  for (i = BLOCK; i < nb; i++)
    {
#ifdef BLOCK2
      s += hh[i-1] * hh[(i+ldh)];
#endif
#ifdef BLOCK4
776 777 778
      s_1_2 += hh[i-1] * hh[(i+ldh)];           
      s_2_3 += hh[(ldh)+i-1] * hh[i+(ldh*2)];   
      s_3_4 += hh[(ldh*2)+i-1] * hh[i+(ldh*3)]; 
779

780 781 782 783 784 785 786 787 788 789 790 791 792 793 794 795 796 797 798 799 800 801 802 803 804 805
      s_1_3 += hh[i-2] * hh[i+(ldh*2)];         
      s_2_4 += hh[(ldh*1)+i-2] * hh[i+(ldh*3)]; 

      s_1_4 += hh[i-3] * hh[i+(ldh*3)];         
#endif /* BLOCK4 */
#ifdef BLOCK6
      scalarprods[0] += hh[i-1] * hh[(i+ldh)];           
      scalarprods[2] += hh[(ldh)+i-1] * hh[i+(ldh*2)];   
      scalarprods[5] += hh[(ldh*2)+i-1] * hh[i+(ldh*3)]; 
      scalarprods[9] += hh[(ldh*3)+i-1] * hh[i+(ldh*4)]; 
      scalarprods[14] += hh[(ldh*4)+i-1] * hh[i+(ldh*5)];

      scalarprods[1] += hh[i-2] * hh[i+(ldh*2)];         
      scalarprods[4] += hh[(ldh*1)+i-2] * hh[i+(ldh*3)]; 
      scalarprods[8] += hh[(ldh*2)+i-2] * hh[i+(ldh*4)]; 
      scalarprods[13] += hh[(ldh*3)+i-2] * hh[i+(ldh*5)];

      scalarprods[3] += hh[i-3] * hh[i+(ldh*3)];         
      scalarprods[7] += hh[(ldh)+i-3] * hh[i+(ldh*4)];   
      scalarprods[12] += hh[(ldh*2)+i-3] * hh[i+(ldh*5)];

      scalarprods[6] += hh[i-4] * hh[i+(ldh*4)];         
      scalarprods[11] += hh[(ldh)+i-4] * hh[i+(ldh*5)];  

      scalarprods[10] += hh[i-5] * hh[i+(ldh*5)];        
#endif /* BLOCK6 */
806 807 808 809

    }

  // Production level kernel calls with padding
810 811
#ifdef BLOCK2

812
#if  VEC_SET == 128 || VEC_SET == 1281
813
#ifdef DOUBLE_PRECISION_REAL
814 815 816
#define STEP_SIZE 12
#define ROW_LENGTH 12
#define UPPER_BOUND 10
817 818
#endif
#ifdef SINGLE_PRECISION_REAL
819 820 821 822 823 824 825 826 827 828 829 830 831 832 833 834 835
#define STEP_SIZE 24
#define ROW_LENGTH 24
#define UPPER_BOUND 20
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define STEP_SIZE 24
#define ROW_LENGTH 24
#define UPPER_BOUND 20
#endif
#ifdef SINGLE_PRECISION_REAL
#define STEP_SIZE 48
#define ROW_LENGTH 48
#define UPPER_BOUND 40
#endif
836
#endif /*  VEC_SET == 256 */
837 838

  for (i = 0; i < nq - UPPER_BOUND; i+= STEP_SIZE )
839
    {
840 841
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
842 843 844 845 846 847 848
    }

  if (nq == i)
    {
      return;
    }

849 850
#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
851
#ifdef DOUBLE_PRECISION_REAL
852
#define ROW_LENGTH 10
853 854
#endif
#ifdef SINGLE_PRECISION_REAL
855
#define ROW_LENGTH 20
856
#endif
857
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
858

859
#if  VEC_SET == 256
860
#ifdef DOUBLE_PRECISION_REAL
861
#define ROW_LENGTH 20
862 863
#endif
#ifdef SINGLE_PRECISION_REAL
864
#define ROW_LENGTH 40
865
#endif
866
#endif /* VEC_SET == 256 */
867

868
  if (nq-i == ROW_LENGTH)
869
    {
870 871
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
872
    }
873 874 875 876 877

#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 8
878
#endif
879 880 881 882
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 16
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
883

884 885 886 887
#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 16
#endif
888
#ifdef SINGLE_PRECISION_REAL
889 890 891 892 893
#define ROW_LENGTH 32
#endif
#endif /* VEC_SET == 256 */

  if (nq-i == ROW_LENGTH)
894
    {
895 896
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
897
    }
898 899 900 901 902

#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 6
903
#endif
904 905 906 907
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 12
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
908

909
#if  VEC_SET == 256
910
#ifdef DOUBLE_PRECISION_REAL
911 912 913 914 915 916 917 918 919
#define ROW_LENGTH 12
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 24
#endif
#endif /* VEC_SET == 256 */


  if (nq-i == ROW_LENGTH)
920
    {
921 922
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
923 924
    }

925 926 927 928 929
#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 4
#endif
930
#ifdef SINGLE_PRECISION_REAL
931
#define ROW_LENGTH 8
932
#endif
933
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
934

935
#if  VEC_SET == 256
936
#ifdef DOUBLE_PRECISION_REAL
937 938 939 940 941 942 943 944 945
#define ROW_LENGTH 8
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 16
#endif
#endif /* VEC_SET == 256 */


  if (nq-i == ROW_LENGTH)
946
    {
947 948
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
949
    }
950 951 952 953 954 955 956 957

#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 2
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 4
958
#endif
959
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
960

961 962 963 964
#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 4
#endif
965
#ifdef SINGLE_PRECISION_REAL
966 967 968 969 970
#define ROW_LENGTH 8
#endif
#endif /* VEC_SET == 256 */

  if (nq-i == ROW_LENGTH)
971
    {
972 973
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_2hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s);
      worked_on += ROW_LENGTH;
974 975 976 977 978
    }

#endif /* BLOCK2 */

#ifdef BLOCK4
979 980 981 982


#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
983
#ifdef DOUBLE_PRECISION_REAL
984 985 986 987 988 989 990 991
#define ROW_LENGTH 6
#define STEP_SIZE 6
#define UPPER_BOUND 4
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 12
#define STEP_SIZE 12
#define UPPER_BOUND 8
992
#endif
993
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
994

995 996 997 998 999 1000
#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 12
#define STEP_SIZE 12
#define UPPER_BOUND 8
#endif
1001
#ifdef SINGLE_PRECISION_REAL
1002 1003 1004 1005 1006 1007 1008
#define ROW_LENGTH 24
#define STEP_SIZE 24
#define UPPER_BOUND 16
#endif
#endif /* VEC_SET == 256 */

  for (i = 0; i < nq - UPPER_BOUND; i+= STEP_SIZE )
1009
    {
1010 1011
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_4hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s_1_2, s_1_3, s_2_3, s_1_4, s_2_4, s_3_4);
      worked_on += ROW_LENGTH;
1012 1013 1014 1015 1016 1017 1018
    }

  if (nq == i)
    {
      return;
    }

1019 1020 1021

#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
1022
#ifdef DOUBLE_PRECISION_REAL
1023 1024 1025 1026
#define ROW_LENGTH 4
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 8
1027
#endif
1028
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
1029

1030 1031 1032 1033
#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 8
#endif
1034
#ifdef SINGLE_PRECISION_REAL
1035 1036 1037 1038 1039
#define ROW_LENGTH 16
#endif
#endif /* VEC_SET == 256 */

  if (nq-i == ROW_LENGTH )
1040
    {
1041 1042
      CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_4hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s_1_2, s_1_3, s_2_3, s_1_4, s_2_4, s_3_4);
      worked_on += ROW_LENGTH;
1043 1044
    }

1045 1046
#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
1047
#ifdef DOUBLE_PRECISION_REAL
1048
#define ROW_LENGTH 2
1049
#endif
1050 1051 1052 1053
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 4
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */
1054

1055 1056 1057 1058
#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 4
#endif
1059
#ifdef SINGLE_PRECISION_REAL
1060
#define ROW_LENGTH 8
1061
#endif
1062 1063 1064 1065 1066 1067 1068
#endif /* VEC_SET == 256 */

   if (nq-i == ROW_LENGTH )
     {
       CONCAT_6ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_4hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, s_1_2, s_1_3, s_2_3, s_1_4, s_2_4, s_3_4);
       worked_on += ROW_LENGTH;
     }
1069 1070 1071

#endif /* BLOCK4 */

1072 1073 1074 1075 1076 1077 1078 1079 1080 1081 1082 1083 1084 1085 1086 1087 1088 1089 1090 1091 1092 1093 1094 1095 1096 1097 1098 1099 1100 1101 1102 1103 1104 1105 1106 1107 1108
#ifdef BLOCK6
#ifdef DOUBLE_PRECISION_REAL
  
  for (i = 0; i < nq-2; i+=4)
    {
      CONCAT_4ARGS(hh_trafo_kernel_4_,SIMD_SET,_6hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, scalarprods);
      worked_on += 4;
    }
#endif
#ifdef SINGLE_PRECISION_REAL
    for (i = 0; i < nq-4; i+=8)
      {
        CONCAT_4ARGS(hh_trafo_kernel_8_,SIMD_SET,_6hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, scalarprods);
        worked_on += 8;
      }
#endif
    if (nq == i)
      {
        return;
      }
#ifdef DOUBLE_PRECISION_REAL
    if (nq -i == 2)
      {
        CONCAT_4ARGS(hh_trafo_kernel_2_,SIMD_SET,_6hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, scalarprods);
        worked_on += 2;
      }
#endif
#ifdef SINGLE_PRECISION_REAL
    if (nq -i == 4)
      {
        CONCAT_4ARGS(hh_trafo_kernel_4_,SIMD_SET,_6hv_,WORD_LENGTH) (&q[i], hh, nb, ldq, ldh, scalarprods);
        worked_on += 4;
      }
#endif
  
#endif /* BLOCK6 */

1109 1110 1111
#ifdef WITH_DEBUG
  if (worked_on != nq)
    {
1112
      printf("Error in real SIMD_SET BLOCK BLOCK kernel %d %d\n", worked_on, nq);
1113 1114 1115 1116 1117
      abort();
    }
#endif
}

1118 1119 1120 1121 1122 1123 1124 1125 1126 1127 1128 1129 1130 1131 1132 1133 1134 1135
#undef ROW_LENGTH
#if  VEC_SET == 128 || VEC_SET == 1281
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 12
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 24
#endif
#endif /*  VEC_SET == 128 || VEC_SET == 1281 */

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
#define ROW_LENGTH 24
#endif
#ifdef SINGLE_PRECISION_REAL
#define ROW_LENGTH 48
#endif
#endif /* VEC_SET == 256 */
1136 1137 1138
/*
 * Unrolled kernel that computes
#ifdef DOUBLE_PRECISION_REAL
1139
 * ROW_LENGTH rows of Q simultaneously, a
1140 1141
#endif
#ifdef SINGLE_PRECISION_REAL
1142
 * ROW_LENGTH rows of Q simultaneously, a
1143 1144 1145 1146 1147 1148 1149 1150 1151 1152 1153 1154 1155
#endif
 * matrix Vector product with two householder
 */
#ifdef BLOCK2
/*
 * vectors + a rank 2 update is performed
 */
#endif
#ifdef BLOCK4
/*
 * vectors + a rank 1 update is performed
 */
#endif
1156
__forceinline void CONCAT_8ARGS(hh_trafo_kernel_,ROW_LENGTH,_,SIMD_SET,_,BLOCK,hv_,WORD_LENGTH) (DATA_TYPE_PTR q, DATA_TYPE_PTR hh, int nb, int ldq, int ldh,
1157
#ifdef BLOCK2
1158
               DATA_TYPE s)
1159 1160
#endif
#ifdef BLOCK4
1161 1162 1163 1164
               DATA_TYPE s_1_2, DATA_TYPE s_1_3, DATA_TYPE s_2_3, DATA_TYPE s_1_4, DATA_TYPE s_2_4, DATA_TYPE s_3_4)
#endif 
#ifdef BLOCK6
               DATA_TYPE_PTR scalarprods)
1165 1166 1167 1168 1169 1170 1171 1172
#endif
  {
#ifdef BLOCK2
    /////////////////////////////////////////////////////
    // Matrix Vector Multiplication, Q [10 x nb+1] * hh
    // hh contains two householder vectors, with offset 1
    /////////////////////////////////////////////////////
#endif
1173
#if defined(BLOCK4) || defined(BLOCK6)
1174 1175 1176 1177 1178 1179 1180 1181 1182
    /////////////////////////////////////////////////////
    // Matrix Vector Multiplication, Q [10 x nb+3] * hh
    // hh contains four householder vectors
    /////////////////////////////////////////////////////
#endif

    int i;

#ifdef BLOCK2
1183
#if VEC_SET == 128
1184 1185
    // Needed bit mask for floating point sign flip
#ifdef DOUBLE_PRECISION_REAL
1186 1187 1188 1189 1190 1191 1192 1193 1194 1195
    __SIMD_DATATYPE sign = (__SIMD_DATATYPE)_mm_set1_epi64x(0x8000000000000000LL);
#endif
#ifdef SINGLE_PRECISION_REAL
    __SIMD_DATATYPE sign = _mm_castsi128_ps(_mm_set_epi32(0x80000000, 0x80000000, 0x80000000, 0x80000000));
#endif
#endif /* HAVE_SSE_INTRINSICS */

#if  VEC_SET == 256
#ifdef DOUBLE_PRECISION_REAL
        __SIMD_DATATYPE sign = (__SIMD_DATATYPE)_mm256_set1_epi64x(0x8000000000000000);
1196 1197
#endif
#ifdef SINGLE_PRECISION_REAL
1198 1199 1200 1201 1202 1203 1204 1205 1206 1207 1208 1209 1210 1211 1212 1213 1214 1215 1216 1217 1218 1219 1220 1221 1222 1223 1224 1225 1226 1227 1228 1229 1230 1231 1232 1233 1234 1235 1236 1237 1238 1239 1240 1241 1242 1243 1244 1245 1246
        __SIMD_DATATYPE sign = (__SIMD_DATATYPE)_mm256_set1_epi32(0x80000000);
#endif
#endif /* VEC_SET == 256 */

    __SIMD_DATATYPE x1 = _SIMD_LOAD(&q[ldq]);
    __SIMD_DATATYPE x2 = _SIMD_LOAD(&q[ldq+offset]);
    __SIMD_DATATYPE x3 = _SIMD_LOAD(&q[ldq+2*offset]);
    __SIMD_DATATYPE x4 = _SIMD_LOAD(&q[ldq+3*offset]);
    __SIMD_DATATYPE x5 = _SIMD_LOAD(&q[ldq+4*offset]);
    __SIMD_DATATYPE x6 = _SIMD_LOAD(&q[ldq+5*offset]);

#if VEC_SET == 128
    __SIMD_DATATYPE h1 = _SSE_SET1(hh[ldh+1]);
#endif
#if VEC_SET == 1281
    __SIMD_DATATYPE h1 = _SSE_SET(hh[ldh+1], hh[ldh+1]);
#endif
#if VEC_SET == 256
    __SIMD_DATATYPE h1 = _SIMD_BROADCAST(&hh[ldh+1]);
#endif
 
    __SIMD_DATATYPE h2;
#ifdef __ELPA_USE_FMA__
    __SIMD_DATATYPE q1 = _SIMD_LOAD(q);
    __SIMD_DATATYPE y1 = _SIMD_FMA(x1, h1, q1);
    __SIMD_DATATYPE q2 = _SIMD_LOAD(&q[offset]);
    __SIMD_DATATYPE y2 = _SIMD_FMA(x2, h1, q2);
    __SIMD_DATATYPE q3 = _SIMD_LOAD(&q[2*offset]);
    __SIMD_DATATYPE y3 = _SIMD_FMA(x3, h1, q3);
    __SIMD_DATATYPE q4 = _SIMD_LOAD(&q[3*offset]);
    __SIMD_DATATYPE y4 = _SIMD_FMA(x4, h1, q4);
    __SIMD_DATATYPE q5 = _SIMD_LOAD(&q[4*offset]);
    __SIMD_DATATYPE y5 = _SIMD_FMA(x5, h1, q5);
    __SIMD_DATATYPE q6 = _SIMD_LOAD(&q[5*offset]);
    __SIMD_DATATYPE y6 = _SIMD_FMA(x6, h1, q6);
#else
    __SIMD_DATATYPE q1 = _SIMD_LOAD(q);
    __SIMD_DATATYPE y1 = _SIMD_ADD(q1, _SIMD_MUL(x1, h1));
    __SIMD_DATATYPE q2 = _SIMD_LOAD(&q[offset]);
    __SIMD_DATATYPE y2 = _SIMD_ADD(q2, _SIMD_MUL(x2, h1));
    __SIMD_DATATYPE q3 = _SIMD_LOAD(&q[2*offset]);
    __SIMD_DATATYPE y3 = _SIMD_ADD(q3, _SIMD_MUL(x3, h1));
    __SIMD_DATATYPE q4 = _SIMD_LOAD(&q[3*offset]);
    __SIMD_DATATYPE y4 = _SIMD_ADD(q4, _SIMD_MUL(x4, h1));
    __SIMD_DATATYPE q5 = _SIMD_LOAD(&q[4*offset]);
    __SIMD_DATATYPE y5 = _SIMD_ADD(q5, _SIMD_MUL(x5, h1));
    __SIMD_DATATYPE q6 = _SIMD_LOAD(&q[5*offset]);
    __SIMD_DATATYPE y6 = _SIMD_ADD(q6, _SIMD_MUL(x6, h1));
#endif
1247 1248 1249
#endif /* BLOCK2 */

#ifdef BLOCK4
1250 1251 1252 1253 1254 1255 1256 1257 1258 1259 1260 1261 1262 1263 1264 1265 1266 1267 1268 1269 1270 1271 1272
    __SIMD_DATATYPE a1_1 = _SIMD_LOAD(&q[ldq*3]);
    __SIMD_DATATYPE a2_1 = _SIMD_LOAD(&q[ldq*2]);
    __SIMD_DATATYPE a3_1 = _SIMD_LOAD(&q[ldq]);  
    __SIMD_DATATYPE a4_1 = _SIMD_LOAD(&q[0]);    

#if VEC_SET == 128
    __SIMD_DATATYPE h_2_1 = _SSE_SET1(hh[ldh+1]);    
    __SIMD_DATATYPE h_3_2 = _SSE_SET1(hh[(ldh*2)+1]);
    __SIMD_DATATYPE h_3_1 = _SSE_SET1(hh[(ldh*2)+2]);
    __SIMD_DATATYPE h_4_3 = _SSE_SET1(hh[(ldh*3)+1]);
    __SIMD_DATATYPE h_4_2 = _SSE_SET1(hh[(ldh*3)+2]);
    __SIMD_DATATYPE h_4_1 = _SSE_SET1(hh[(ldh*3)+3]);
#endif

#if VEC_SET == 1281
    __SIMD_DATATYPE h_2_1 = _SSE_SET(hh[ldh+1], hh[ldh+1]);
    __SIMD_DATATYPE h_3_2 = _SSE_SET(hh[(ldh*2)+1], hh[(ldh*2)+1]);
    __SIMD_DATATYPE h_3_1 = _SSE_SET(hh[(ldh*2)+2], hh[(ldh*2)+2]);
    __SIMD_DATATYPE h_4_3 = _SSE_SET(hh[(ldh*3)+1], hh[(ldh*3)+1]);
    __SIMD_DATATYPE h_4_2 = _SSE_SET(hh[(ldh*3)+2], hh[(ldh*3)+2]);
    __SIMD_DATATYPE h_4_1 = _SSE_SET(hh[(ldh*3)+3], hh[(ldh*3)+3]);
#endif

1273 1274 1275 1276 1277 1278 1279 1280 1281 1282 1283 1284 1285 1286 1287 1288 1289 1290
#if VEC_SET == 256
    __SIMD_DATATYPE h_2_1 = _SIMD_BROADCAST(&hh[ldh+1]);
    __SIMD_DATATYPE h_3_2 = _SIMD_BROADCAST(&hh[(ldh*2)+1]);
    __SIMD_DATATYPE h_3_1 = _SIMD_BROADCAST(&hh[(ldh*2)+2]);
    __SIMD_DATATYPE h_4_3 = _SIMD_BROADCAST(&hh[(ldh*3)+1]);
    __SIMD_DATATYPE h_4_2 = _SIMD_BROADCAST(&hh[(ldh*3)+2]);
    __SIMD_DATATYPE h_4_1 = _SIMD_BROADCAST(&hh[(ldh*3)+3]);
#endif

#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w1 = _SIMD_FMA(a3_1, h_4_3, a4_1);
    w1 = _SIMD_FMA(a2_1, h_4_2, w1);
    w1 = _SIMD_FMA(a1_1, h_4_1, w1);
    register __SIMD_DATATYPE z1 = _SIMD_FMA(a2_1, h_3_2, a3_1);
    z1 = _SIMD_FMA(a1_1, h_3_1, z1);
    register __SIMD_DATATYPE y1 = _SIMD_FMA(a1_1, h_2_1, a2_1);
    register __SIMD_DATATYPE x1 = a1_1;
#else
1291 1292 1293 1294 1295 1296 1297
    register __SIMD_DATATYPE w1 = _SIMD_ADD(a4_1, _SIMD_MUL(a3_1, h_4_3));
    w1 = _SIMD_ADD(w1, _SIMD_MUL(a2_1, h_4_2));                          
    w1 = _SIMD_ADD(w1, _SIMD_MUL(a1_1, h_4_1));                          
    register __SIMD_DATATYPE z1 = _SIMD_ADD(a3_1, _SIMD_MUL(a2_1, h_3_2));
    z1 = _SIMD_ADD(z1, _SIMD_MUL(a1_1, h_3_1));                          
    register __SIMD_DATATYPE y1 = _SIMD_ADD(a2_1, _SIMD_MUL(a1_1, h_2_1));
    register __SIMD_DATATYPE x1 = a1_1;
1298
#endif /* __ELPA_USE_FMA__ */
1299 1300 1301 1302 1303 1304

    __SIMD_DATATYPE a1_2 = _SIMD_LOAD(&q[(ldq*3)+offset]);                  
    __SIMD_DATATYPE a2_2 = _SIMD_LOAD(&q[(ldq*2)+offset]);
    __SIMD_DATATYPE a3_2 = _SIMD_LOAD(&q[ldq+offset]);
    __SIMD_DATATYPE a4_2 = _SIMD_LOAD(&q[0+offset]);

1305 1306 1307 1308 1309 1310 1311 1312 1313
#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w2 = _SIMD_FMA(a3_2, h_4_3, a4_2);
    w2 = _SIMD_FMA(a2_2, h_4_2, w2);
    w2 = _SIMD_FMA(a1_2, h_4_1, w2);
    register __SIMD_DATATYPE z2 = _SIMD_FMA(a2_2, h_3_2, a3_2);
    z2 = _SIMD_FMA(a1_2, h_3_1, z2);
    register __SIMD_DATATYPE y2 = _SIMD_FMA(a1_2, h_2_1, a2_2);
    register __SIMD_DATATYPE x2 = a1_2;
#else
1314 1315 1316 1317 1318 1319 1320
    register __SIMD_DATATYPE w2 = _SIMD_ADD(a4_2, _SIMD_MUL(a3_2, h_4_3));
    w2 = _SIMD_ADD(w2, _SIMD_MUL(a2_2, h_4_2));
    w2 = _SIMD_ADD(w2, _SIMD_MUL(a1_2, h_4_1));
    register __SIMD_DATATYPE z2 = _SIMD_ADD(a3_2, _SIMD_MUL(a2_2, h_3_2));
    z2 = _SIMD_ADD(z2, _SIMD_MUL(a1_2, h_3_1));
    register __SIMD_DATATYPE y2 = _SIMD_ADD(a2_2, _SIMD_MUL(a1_2, h_2_1));
    register __SIMD_DATATYPE x2 = a1_2;
1321
#endif /* __ELPA_USE_FMA__ */
1322 1323 1324 1325 1326 1327

    __SIMD_DATATYPE a1_3 = _SIMD_LOAD(&q[(ldq*3)+2*offset]);
    __SIMD_DATATYPE a2_3 = _SIMD_LOAD(&q[(ldq*2)+2*offset]);
    __SIMD_DATATYPE a3_3 = _SIMD_LOAD(&q[ldq+2*offset]);
    __SIMD_DATATYPE a4_3 = _SIMD_LOAD(&q[0+2*offset]);

1328 1329 1330 1331 1332 1333 1334 1335 1336
#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w3 = _SIMD_FMA(a3_3, h_4_3, a4_3);
    w3 = _SIMD_FMA(a2_3, h_4_2, w3);
    w3 = _SIMD_FMA(a1_3, h_4_1, w3);
    register __SIMD_DATATYPE z3 = _SIMD_FMA(a2_3, h_3_2, a3_3);
    z3 = _SIMD_FMA(a1_3, h_3_1, z3);
    register __SIMD_DATATYPE y3 = _SIMD_FMA(a1_3, h_2_1, a2_3);
    register __SIMD_DATATYPE x3 = a1_3;
#else
1337 1338 1339 1340 1341 1342 1343
    register __SIMD_DATATYPE w3 = _SIMD_ADD(a4_3, _SIMD_MUL(a3_3, h_4_3));
    w3 = _SIMD_ADD(w3, _SIMD_MUL(a2_3, h_4_2));
    w3 = _SIMD_ADD(w3, _SIMD_MUL(a1_3, h_4_1));
    register __SIMD_DATATYPE z3 = _SIMD_ADD(a3_3, _SIMD_MUL(a2_3, h_3_2));
    z3 = _SIMD_ADD(z3, _SIMD_MUL(a1_3, h_3_1));
    register __SIMD_DATATYPE y3 = _SIMD_ADD(a2_3, _SIMD_MUL(a1_3, h_2_1));
    register __SIMD_DATATYPE x3 = a1_3;
1344
#endif /* __ELPA_USE_FMA__ */
1345 1346 1347 1348 1349 1350

    __SIMD_DATATYPE a1_4 = _SIMD_LOAD(&q[(ldq*3)+3*offset]);
    __SIMD_DATATYPE a2_4 = _SIMD_LOAD(&q[(ldq*2)+3*offset]);
    __SIMD_DATATYPE a3_4 = _SIMD_LOAD(&q[ldq+3*offset]);
    __SIMD_DATATYPE a4_4 = _SIMD_LOAD(&q[0+3*offset]);

1351 1352 1353 1354 1355 1356 1357 1358 1359
#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w4 = _SIMD_FMA(a3_4, h_4_3, a4_4);
    w4 = _SIMD_FMA(a2_4, h_4_2, w4);
    w4 = _SIMD_FMA(a1_4, h_4_1, w4);
    register __SIMD_DATATYPE z4 = _SIMD_FMA(a2_4, h_3_2, a3_4);
    z4 = _SIMD_FMA(a1_4, h_3_1, z4);
    register __SIMD_DATATYPE y4 = _SIMD_FMA(a1_4, h_2_1, a2_4);
    register __SIMD_DATATYPE x4 = a1_4;
#else
1360 1361 1362 1363 1364 1365 1366
    register __SIMD_DATATYPE w4 = _SIMD_ADD(a4_4, _SIMD_MUL(a3_4, h_4_3));
    w4 = _SIMD_ADD(w4, _SIMD_MUL(a2_4, h_4_2));
    w4 = _SIMD_ADD(w4, _SIMD_MUL(a1_4, h_4_1));
    register __SIMD_DATATYPE z4 = _SIMD_ADD(a3_4, _SIMD_MUL(a2_4, h_3_2));
    z4 = _SIMD_ADD(z4, _SIMD_MUL(a1_4, h_3_1));
    register __SIMD_DATATYPE y4 = _SIMD_ADD(a2_4, _SIMD_MUL(a1_4, h_2_1));
    register __SIMD_DATATYPE x4 = a1_4;
1367
#endif /* __ELPA_USE_FMA__ */
1368 1369 1370 1371 1372 1373

    __SIMD_DATATYPE a1_5 = _SIMD_LOAD(&q[(ldq*3)+4*offset]);
    __SIMD_DATATYPE a2_5 = _SIMD_LOAD(&q[(ldq*2)+4*offset]);
    __SIMD_DATATYPE a3_5 = _SIMD_LOAD(&q[ldq+4*offset]);
    __SIMD_DATATYPE a4_5 = _SIMD_LOAD(&q[0+4*offset]);

1374 1375 1376 1377 1378 1379 1380 1381 1382
#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w5 = _SIMD_FMA(a3_5, h_4_3, a4_5);
    w5 = _SIMD_FMA(a2_5, h_4_2, w5);
    w5 = _SIMD_FMA(a1_5, h_4_1, w5);
    register __SIMD_DATATYPE z5 = _SIMD_FMA(a2_5, h_3_2, a3_5);
    z5 = _SIMD_FMA(a1_5, h_3_1, z5);
    register __SIMD_DATATYPE y5 = _SIMD_FMA(a1_5, h_2_1, a2_5);
    register __SIMD_DATATYPE x5 = a1_5;
#else
1383 1384 1385 1386 1387 1388 1389
    register __SIMD_DATATYPE w5 = _SIMD_ADD(a4_5, _SIMD_MUL(a3_5, h_4_3));
    w5 = _SIMD_ADD(w5, _SIMD_MUL(a2_5, h_4_2));
    w5 = _SIMD_ADD(w5, _SIMD_MUL(a1_5, h_4_1));
    register __SIMD_DATATYPE z5 = _SIMD_ADD(a3_5, _SIMD_MUL(a2_5, h_3_2));
    z5 = _SIMD_ADD(z5, _SIMD_MUL(a1_5, h_3_1));
    register __SIMD_DATATYPE y5 = _SIMD_ADD(a2_5, _SIMD_MUL(a1_5, h_2_1));
    register __SIMD_DATATYPE x5 = a1_5;
1390
#endif /* __ELPA_USE_FMA__ */
1391 1392 1393 1394 1395 1396

    __SIMD_DATATYPE a1_6 = _SIMD_LOAD(&q[(ldq*3)+5*offset]);
    __SIMD_DATATYPE a2_6 = _SIMD_LOAD(&q[(ldq*2)+5*offset]);
    __SIMD_DATATYPE a3_6 = _SIMD_LOAD(&q[ldq+5*offset]);
    __SIMD_DATATYPE a4_6 = _SIMD_LOAD(&q[0+5*offset]);

1397 1398 1399 1400 1401 1402 1403 1404 1405
#ifdef __ELPA_USE_FMA__
    register __SIMD_DATATYPE w6 = _SIMD_FMA(a3_6, h_4_3, a4_6);
    w6 = _SIMD_FMA(a2_6, h_4_2, w6);
    w6 = _SIMD_FMA(a1_6, h_4_1, w6);
    register __SIMD_DATATYPE z6 = _SIMD_FMA(a2_6, h_3_2, a3_6);
    z6 = _SIMD_FMA(a1_6, h_3_1, z6);
    register __SIMD_DATATYPE y6 = _SIMD_FMA(a1_6, h_2_1, a2_6);
    register __SIMD_DATATYPE x6 = a1_6;
#else
1406 1407 1408 1409 1410 1411 1412
    register __SIMD_DATATYPE w6 = _SIMD_ADD(a4_6, _SIMD_MUL(a3_6, h_4_3));
    w6 = _SIMD_ADD(w6, _SIMD_MUL(a2_6, h_4_2));
    w6 = _SIMD_ADD(w6, _SIMD_MUL(a1_6, h_4_1));
    register __SIMD_DATATYPE z6 = _SIMD_ADD(a3_6, _SIMD_MUL(a2_6, h_3_2));
    z6 = _SIMD_ADD(z6, _SIMD_MUL(a1_6, h_3_1));
    register __SIMD_DATATYPE y6 = _SIMD_ADD(a2_6, _SIMD_MUL(a1_6, h_2_1));
    register __SIMD_DATATYPE x6 = a1_6;
1413
#endif /* __ELPA_USE_FMA__ */
1414 1415 1416 1417 1418 1419 1420 1421 1422 1423 1424 1425

    __SIMD_DATATYPE q1;
    __SIMD_DATATYPE q2;
    __SIMD_DATATYPE q3;
    __SIMD_DATATYPE q4;
    __SIMD_DATATYPE q5;
    __SIMD_DATATYPE q6;

    __SIMD_DATATYPE h1;
    __SIMD_DATATYPE h2;
    __SIMD_DATATYPE h3;
    __SIMD_DATATYPE h4;
1426 1427
#endif /* BLOCK4 */

1428 1429
#ifdef BLOCK6
    
1430 1431 1432 1433 1434 1435 1436 1437