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elpa2_kernels_real_avx-avx2_2hv.c 32.1 KB
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//    This file is part of ELPA.
//
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//    The ELPA library was originally created by the ELPA consortium,
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//    consisting of the following organizations:
//
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//    - Max Planck Computing and Data Facility (MPCDF), formerly known as
//      Rechenzentrum Garching der Max-Planck-Gesellschaft (RZG),
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//    - Bergische Universität Wuppertal, Lehrstuhl für angewandte
//      Informatik,
//    - Technische Universität München, Lehrstuhl für Informatik mit
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//      Schwerpunkt Wissenschaftliches Rechnen ,
//    - Fritz-Haber-Institut, Berlin, Abt. Theorie,
//    - Max-Plack-Institut für Mathematik in den Naturwissenschaftrn,
//      Leipzig, Abt. Komplexe Strukutren in Biologie und Kognition,
//      and
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//    - IBM Deutschland GmbH
//
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//    This particular source code file contains additions, changes and
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//    enhancements authored by Intel Corporation which is not part of
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//    the ELPA consortium.
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//
//    More information can be found here:
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//    http://elpa.mpcdf.mpg.de/
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//
//    ELPA is free software: you can redistribute it and/or modify
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//    it under the terms of the version 3 of the license of the
//    GNU Lesser General Public License as published by the Free
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//    Software Foundation.
//
//    ELPA is distributed in the hope that it will be useful,
//    but WITHOUT ANY WARRANTY; without even the implied warranty of
//    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
//    GNU Lesser General Public License for more details.
//
//    You should have received a copy of the GNU Lesser General Public License
//    along with ELPA.  If not, see <http://www.gnu.org/licenses/>
//
//    ELPA reflects a substantial effort on the part of the original
//    ELPA consortium, and we ask you to respect the spirit of the
//    license that we chose: i.e., please contribute any changes you
//    may have back to the original ELPA library distribution, and keep
//    any derivatives of ELPA under the same license that we chose for
//    the original distribution, the GNU Lesser General Public License.
//
//
// --------------------------------------------------------------------------------------------------
//
// This file contains the compute intensive kernels for the Householder transformations.
// It should be compiled with the highest possible optimization level.
//
// On Intel Nehalem or Intel Westmere or AMD Magny Cours use -O3 -msse3
// On Intel Sandy Bridge use -O3 -mavx
//
// Copyright of the original code rests with the authors inside the ELPA
// consortium. The copyright of any additional modifications shall rest
// with their original authors, but shall adhere to the licensing terms
// distributed along with the original code in the file "COPYING".
//
// Author: Alexander Heinecke (alexander.heinecke@mytum.de)
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// Adapted for building a shared-library by Andreas Marek, MPCDF (andreas.marek@mpcdf.mpg.de)
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// --------------------------------------------------------------------------------------------------

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#include "config-f90.h"

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#include <x86intrin.h>

#define __forceinline __attribute__((always_inline)) static

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#ifdef HAVE_AVX2

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#ifdef __FMA4__
#define __ELPA_USE_FMA__
#define _mm256_FMA_pd(a,b,c) _mm256_macc_pd(a,b,c)
#endif

#ifdef __AVX2__
#define __ELPA_USE_FMA__
#define _mm256_FMA_pd(a,b,c) _mm256_fmadd_pd(a,b,c)
#endif

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#endif

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//Forward declaration
__forceinline void hh_trafo_kernel_4_AVX_2hv(double* q, double* hh, int nb, int ldq, int ldh, double s);
__forceinline void hh_trafo_kernel_8_AVX_2hv(double* q, double* hh, int nb, int ldq, int ldh, double s);
__forceinline void hh_trafo_kernel_16_AVX_2hv(double* q, double* hh, int nb, int ldq, int ldh, double s);
__forceinline void hh_trafo_kernel_24_AVX_2hv(double* q, double* hh, int nb, int ldq, int ldh, double s);

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/*
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!f>#if defined(HAVE_AVX) || defined(HAVE_AVX2)
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!f> interface
!f>   subroutine double_hh_trafo_real_avx_avx2_2hv(q, hh, pnb, pnq, pldq, pldh) bind(C, name="double_hh_trafo_real_avx_avx2_2hv")
!f>     use, intrinsic :: iso_c_binding
!f>     integer(kind=c_int)     :: pnb, pnq, pldq, pldh
!f>     real(kind=c_double)     :: q(*)
!f>     real(kind=c_double)     :: hh(pnb,6)
!f>   end subroutine
!f> end interface
!f>#endif
*/

void double_hh_trafo_real_avx_avx2_2hv(double* q, double* hh, int* pnb, int* pnq, int* pldq, int* pldh);

void double_hh_trafo_real_avx_avx2_2hv(double* q, double* hh, int* pnb, int* pnq, int* pldq, int* pldh)
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{
	int i;
	int nb = *pnb;
	int nq = *pldq;
	int ldq = *pldq;
	int ldh = *pldh;

	// calculating scalar product to compute
	// 2 householder vectors simultaneously
	double s = hh[(ldh)+1]*1.0;

	#pragma ivdep
	for (i = 2; i < nb; i++)
	{
		s += hh[i-1] * hh[(i+ldh)];
	}

	// Production level kernel calls with padding
	for (i = 0; i < nq-20; i+=24)
	{
		hh_trafo_kernel_24_AVX_2hv(&q[i], hh, nb, ldq, ldh, s);
	}

	if (nq == i)
	{
		return;
	}

	if (nq-i == 20)
	{
		hh_trafo_kernel_16_AVX_2hv(&q[i], hh, nb, ldq, ldh, s);
		hh_trafo_kernel_4_AVX_2hv(&q[i+16], hh, nb, ldq, ldh, s);
	}
	else if (nq-i == 16)
	{
		hh_trafo_kernel_16_AVX_2hv(&q[i], hh, nb, ldq, ldh, s);
	}
	else if (nq-i == 12)
	{
		hh_trafo_kernel_8_AVX_2hv(&q[i], hh, nb, ldq, ldh, s);
		hh_trafo_kernel_4_AVX_2hv(&q[i+8], hh, nb, ldq, ldh, s);
	}
	else if (nq-i == 8)
	{
		hh_trafo_kernel_8_AVX_2hv(&q[i], hh, nb, ldq, ldh, s);
	}
	else
	{
		hh_trafo_kernel_4_AVX_2hv(&q[i], hh, nb, ldq, ldh, s);
	}
}
/**
 * Unrolled kernel that computes
 * 24 rows of Q simultaneously, a
 * matrix vector product with two householder
 * vectors + a rank 2 update is performed
 */
 __forceinline void hh_trafo_kernel_24_AVX_2hv(double* q, double* hh, int nb, int ldq, int ldh, double s)
{
	/////////////////////////////////////////////////////
	// Matrix Vector Multiplication, Q [24 x nb+1] * hh
	// hh contains two householder vectors, with offset 1
	/////////////////////////////////////////////////////
	int i;
	// Needed bit mask for floating point sign flip
	__m256d sign = (__m256d)_mm256_set1_epi64x(0x8000000000000000);

	__m256d x1 = _mm256_load_pd(&q[ldq]);
	__m256d x2 = _mm256_load_pd(&q[ldq+4]);
	__m256d x3 = _mm256_load_pd(&q[ldq+8]);
	__m256d x4 = _mm256_load_pd(&q[ldq+12]);
	__m256d x5 = _mm256_load_pd(&q[ldq+16]);
	__m256d x6 = _mm256_load_pd(&q[ldq+20]);

	__m256d h1 = _mm256_broadcast_sd(&hh[ldh+1]);
	__m256d h2;

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#ifdef __ELPA_USE_FMA__
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	__m256d q1 = _mm256_load_pd(q);
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	__m256d y1 = _mm256_FMA_pd(x1, h1, q1);
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	__m256d q2 = _mm256_load_pd(&q[4]);
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	__m256d y2 = _mm256_FMA_pd(x2, h1, q2);
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	__m256d q3 = _mm256_load_pd(&q[8]);
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	__m256d y3 = _mm256_FMA_pd(x3, h1, q3);
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	__m256d q4 = _mm256_load_pd(&q[12]);
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	__m256d y4 = _mm256_FMA_pd(x4, h1, q4);
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	__m256d q5 = _mm256_load_pd(&q[16]);
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	__m256d y5 = _mm256_FMA_pd(x5, h1, q5);
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	__m256d q6 = _mm256_load_pd(&q[20]);
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	__m256d y6 = _mm256_FMA_pd(x6, h1, q6);
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#else
	__m256d q1 = _mm256_load_pd(q);
	__m256d y1 = _mm256_add_pd(q1, _mm256_mul_pd(x1, h1));
	__m256d q2 = _mm256_load_pd(&q[4]);
	__m256d y2 = _mm256_add_pd(q2, _mm256_mul_pd(x2, h1));
	__m256d q3 = _mm256_load_pd(&q[8]);
	__m256d y3 = _mm256_add_pd(q3, _mm256_mul_pd(x3, h1));
	__m256d q4 = _mm256_load_pd(&q[12]);
	__m256d y4 = _mm256_add_pd(q4, _mm256_mul_pd(x4, h1));
	__m256d q5 = _mm256_load_pd(&q[16]);
	__m256d y5 = _mm256_add_pd(q5, _mm256_mul_pd(x5, h1));
	__m256d q6 = _mm256_load_pd(&q[20]);
	__m256d y6 = _mm256_add_pd(q6, _mm256_mul_pd(x6, h1));
#endif

	for(i = 2; i < nb; i++)
	{
		h1 = _mm256_broadcast_sd(&hh[i-1]);
		h2 = _mm256_broadcast_sd(&hh[ldh+i]);
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#ifdef __ELPA_USE_FMA__
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		q1 = _mm256_load_pd(&q[i*ldq]);
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		x1 = _mm256_FMA_pd(q1, h1, x1);
		y1 = _mm256_FMA_pd(q1, h2, y1);
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		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
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		x2 = _mm256_FMA_pd(q2, h1, x2);
		y2 = _mm256_FMA_pd(q2, h2, y2);
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		q3 = _mm256_load_pd(&q[(i*ldq)+8]);
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		x3 = _mm256_FMA_pd(q3, h1, x3);
		y3 = _mm256_FMA_pd(q3, h2, y3);
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		q4 = _mm256_load_pd(&q[(i*ldq)+12]);
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		x4 = _mm256_FMA_pd(q4, h1, x4);
		y4 = _mm256_FMA_pd(q4, h2, y4);
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		q5 = _mm256_load_pd(&q[(i*ldq)+16]);
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		x5 = _mm256_FMA_pd(q5, h1, x5);
		y5 = _mm256_FMA_pd(q5, h2, y5);
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		q6 = _mm256_load_pd(&q[(i*ldq)+20]);
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		x6 = _mm256_FMA_pd(q6, h1, x6);
		y6 = _mm256_FMA_pd(q6, h2, y6);
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#else
		q1 = _mm256_load_pd(&q[i*ldq]);
		x1 = _mm256_add_pd(x1, _mm256_mul_pd(q1,h1));
		y1 = _mm256_add_pd(y1, _mm256_mul_pd(q1,h2));
		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
		x2 = _mm256_add_pd(x2, _mm256_mul_pd(q2,h1));
		y2 = _mm256_add_pd(y2, _mm256_mul_pd(q2,h2));
		q3 = _mm256_load_pd(&q[(i*ldq)+8]);
		x3 = _mm256_add_pd(x3, _mm256_mul_pd(q3,h1));
		y3 = _mm256_add_pd(y3, _mm256_mul_pd(q3,h2));
		q4 = _mm256_load_pd(&q[(i*ldq)+12]);
		x4 = _mm256_add_pd(x4, _mm256_mul_pd(q4,h1));
		y4 = _mm256_add_pd(y4, _mm256_mul_pd(q4,h2));
		q5 = _mm256_load_pd(&q[(i*ldq)+16]);
		x5 = _mm256_add_pd(x5, _mm256_mul_pd(q5,h1));
		y5 = _mm256_add_pd(y5, _mm256_mul_pd(q5,h2));
		q6 = _mm256_load_pd(&q[(i*ldq)+20]);
		x6 = _mm256_add_pd(x6, _mm256_mul_pd(q6,h1));
		y6 = _mm256_add_pd(y6, _mm256_mul_pd(q6,h2));
#endif
	}

	h1 = _mm256_broadcast_sd(&hh[nb-1]);
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#ifdef __ELPA_USE_FMA__
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	q1 = _mm256_load_pd(&q[nb*ldq]);
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	x1 = _mm256_FMA_pd(q1, h1, x1);
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	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
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	x2 = _mm256_FMA_pd(q2, h1, x2);
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	q3 = _mm256_load_pd(&q[(nb*ldq)+8]);
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	x3 = _mm256_FMA_pd(q3, h1, x3);
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	q4 = _mm256_load_pd(&q[(nb*ldq)+12]);
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	x4 = _mm256_FMA_pd(q4, h1, x4);
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	q5 = _mm256_load_pd(&q[(nb*ldq)+16]);
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	x5 = _mm256_FMA_pd(q5, h1, x5);
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	q6 = _mm256_load_pd(&q[(nb*ldq)+20]);
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	x6 = _mm256_FMA_pd(q6, h1, x6);
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#else
	q1 = _mm256_load_pd(&q[nb*ldq]);
	x1 = _mm256_add_pd(x1, _mm256_mul_pd(q1,h1));
	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
	x2 = _mm256_add_pd(x2, _mm256_mul_pd(q2,h1));
	q3 = _mm256_load_pd(&q[(nb*ldq)+8]);
	x3 = _mm256_add_pd(x3, _mm256_mul_pd(q3,h1));
	q4 = _mm256_load_pd(&q[(nb*ldq)+12]);
	x4 = _mm256_add_pd(x4, _mm256_mul_pd(q4,h1));
	q5 = _mm256_load_pd(&q[(nb*ldq)+16]);
	x5 = _mm256_add_pd(x5, _mm256_mul_pd(q5,h1));
	q6 = _mm256_load_pd(&q[(nb*ldq)+20]);
	x6 = _mm256_add_pd(x6, _mm256_mul_pd(q6,h1));
#endif

	/////////////////////////////////////////////////////
	// Rank-2 update of Q [24 x nb+1]
	/////////////////////////////////////////////////////

	__m256d tau1 = _mm256_broadcast_sd(hh);
	__m256d tau2 = _mm256_broadcast_sd(&hh[ldh]);
	__m256d vs = _mm256_broadcast_sd(&s);

	h1 = _mm256_xor_pd(tau1, sign);
	x1 = _mm256_mul_pd(x1, h1);
	x2 = _mm256_mul_pd(x2, h1);
	x3 = _mm256_mul_pd(x3, h1);
	x4 = _mm256_mul_pd(x4, h1);
	x5 = _mm256_mul_pd(x5, h1);
	x6 = _mm256_mul_pd(x6, h1);
	h1 = _mm256_xor_pd(tau2, sign);
	h2 = _mm256_mul_pd(h1, vs);
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#ifdef __ELPA_USE_FMA__
	y1 = _mm256_FMA_pd(y1, h1, _mm256_mul_pd(x1,h2));
	y2 = _mm256_FMA_pd(y2, h1, _mm256_mul_pd(x2,h2));
	y3 = _mm256_FMA_pd(y3, h1, _mm256_mul_pd(x3,h2));
	y4 = _mm256_FMA_pd(y4, h1, _mm256_mul_pd(x4,h2));
	y5 = _mm256_FMA_pd(y5, h1, _mm256_mul_pd(x5,h2));
	y6 = _mm256_FMA_pd(y6, h1, _mm256_mul_pd(x6,h2));
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#else
	y1 = _mm256_add_pd(_mm256_mul_pd(y1,h1), _mm256_mul_pd(x1,h2));
	y2 = _mm256_add_pd(_mm256_mul_pd(y2,h1), _mm256_mul_pd(x2,h2));
	y3 = _mm256_add_pd(_mm256_mul_pd(y3,h1), _mm256_mul_pd(x3,h2));
	y4 = _mm256_add_pd(_mm256_mul_pd(y4,h1), _mm256_mul_pd(x4,h2));
	y5 = _mm256_add_pd(_mm256_mul_pd(y5,h1), _mm256_mul_pd(x5,h2));
	y6 = _mm256_add_pd(_mm256_mul_pd(y6,h1), _mm256_mul_pd(x6,h2));
#endif

	q1 = _mm256_load_pd(q);
	q1 = _mm256_add_pd(q1, y1);
	_mm256_store_pd(q,q1);
	q2 = _mm256_load_pd(&q[4]);
	q2 = _mm256_add_pd(q2, y2);
	_mm256_store_pd(&q[4],q2);
	q3 = _mm256_load_pd(&q[8]);
	q3 = _mm256_add_pd(q3, y3);
	_mm256_store_pd(&q[8],q3);
	q4 = _mm256_load_pd(&q[12]);
	q4 = _mm256_add_pd(q4, y4);
	_mm256_store_pd(&q[12],q4);
	q5 = _mm256_load_pd(&q[16]);
	q5 = _mm256_add_pd(q5, y5);
	_mm256_store_pd(&q[16],q5);
	q6 = _mm256_load_pd(&q[20]);
	q6 = _mm256_add_pd(q6, y6);
	_mm256_store_pd(&q[20],q6);

	h2 = _mm256_broadcast_sd(&hh[ldh+1]);
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#ifdef __ELPA_USE_FMA__
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	q1 = _mm256_load_pd(&q[ldq]);
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	q1 = _mm256_add_pd(q1, _mm256_FMA_pd(y1, h2, x1));
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	_mm256_store_pd(&q[ldq],q1);
	q2 = _mm256_load_pd(&q[ldq+4]);
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	q2 = _mm256_add_pd(q2, _mm256_FMA_pd(y2, h2, x2));
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	_mm256_store_pd(&q[ldq+4],q2);
	q3 = _mm256_load_pd(&q[ldq+8]);
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	q3 = _mm256_add_pd(q3, _mm256_FMA_pd(y3, h2, x3));
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	_mm256_store_pd(&q[ldq+8],q3);
	q4 = _mm256_load_pd(&q[ldq+12]);
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	q4 = _mm256_add_pd(q4, _mm256_FMA_pd(y4, h2, x4));
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	_mm256_store_pd(&q[ldq+12],q4);
	q5 = _mm256_load_pd(&q[ldq+16]);
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	q5 = _mm256_add_pd(q5, _mm256_FMA_pd(y5, h2, x5));
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	_mm256_store_pd(&q[ldq+16],q5);
	q6 = _mm256_load_pd(&q[ldq+20]);
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	q6 = _mm256_add_pd(q6, _mm256_FMA_pd(y6, h2, x6));
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	_mm256_store_pd(&q[ldq+20],q6);
#else
	q1 = _mm256_load_pd(&q[ldq]);
	q1 = _mm256_add_pd(q1, _mm256_add_pd(x1, _mm256_mul_pd(y1, h2)));
	_mm256_store_pd(&q[ldq],q1);
	q2 = _mm256_load_pd(&q[ldq+4]);
	q2 = _mm256_add_pd(q2, _mm256_add_pd(x2, _mm256_mul_pd(y2, h2)));
	_mm256_store_pd(&q[ldq+4],q2);
	q3 = _mm256_load_pd(&q[ldq+8]);
	q3 = _mm256_add_pd(q3, _mm256_add_pd(x3, _mm256_mul_pd(y3, h2)));
	_mm256_store_pd(&q[ldq+8],q3);
	q4 = _mm256_load_pd(&q[ldq+12]);
	q4 = _mm256_add_pd(q4, _mm256_add_pd(x4, _mm256_mul_pd(y4, h2)));
	_mm256_store_pd(&q[ldq+12],q4);
	q5 = _mm256_load_pd(&q[ldq+16]);
	q5 = _mm256_add_pd(q5, _mm256_add_pd(x5, _mm256_mul_pd(y5, h2)));
	_mm256_store_pd(&q[ldq+16],q5);
	q6 = _mm256_load_pd(&q[ldq+20]);
	q6 = _mm256_add_pd(q6, _mm256_add_pd(x6, _mm256_mul_pd(y6, h2)));
	_mm256_store_pd(&q[ldq+20],q6);
#endif

	for (i = 2; i < nb; i++)
	{
		h1 = _mm256_broadcast_sd(&hh[i-1]);
		h2 = _mm256_broadcast_sd(&hh[ldh+i]);
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#ifdef __ELPA_USE_FMA__
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		q1 = _mm256_load_pd(&q[i*ldq]);
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		q1 = _mm256_FMA_pd(x1, h1, q1);
		q1 = _mm256_FMA_pd(y1, h2, q1);
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		_mm256_store_pd(&q[i*ldq],q1);
		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
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		q2 = _mm256_FMA_pd(x2, h1, q2);
		q2 = _mm256_FMA_pd(y2, h2, q2);
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		_mm256_store_pd(&q[(i*ldq)+4],q2);
		q3 = _mm256_load_pd(&q[(i*ldq)+8]);
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		q3 = _mm256_FMA_pd(x3, h1, q3);
		q3 = _mm256_FMA_pd(y3, h2, q3);
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		_mm256_store_pd(&q[(i*ldq)+8],q3);
		q4 = _mm256_load_pd(&q[(i*ldq)+12]);
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		q4 = _mm256_FMA_pd(x4, h1, q4);
		q4 = _mm256_FMA_pd(y4, h2, q4);
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		_mm256_store_pd(&q[(i*ldq)+12],q4);
		q5 = _mm256_load_pd(&q[(i*ldq)+16]);
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		q5 = _mm256_FMA_pd(x5, h1, q5);
		q5 = _mm256_FMA_pd(y5, h2, q5);
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		_mm256_store_pd(&q[(i*ldq)+16],q5);
		q6 = _mm256_load_pd(&q[(i*ldq)+20]);
403 404
		q6 = _mm256_FMA_pd(x6, h1, q6);
		q6 = _mm256_FMA_pd(y6, h2, q6);
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		_mm256_store_pd(&q[(i*ldq)+20],q6);
#else
		q1 = _mm256_load_pd(&q[i*ldq]);
		q1 = _mm256_add_pd(q1, _mm256_add_pd(_mm256_mul_pd(x1,h1), _mm256_mul_pd(y1, h2)));
		_mm256_store_pd(&q[i*ldq],q1);
		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
		q2 = _mm256_add_pd(q2, _mm256_add_pd(_mm256_mul_pd(x2,h1), _mm256_mul_pd(y2, h2)));
		_mm256_store_pd(&q[(i*ldq)+4],q2);
		q3 = _mm256_load_pd(&q[(i*ldq)+8]);
		q3 = _mm256_add_pd(q3, _mm256_add_pd(_mm256_mul_pd(x3,h1), _mm256_mul_pd(y3, h2)));
		_mm256_store_pd(&q[(i*ldq)+8],q3);
		q4 = _mm256_load_pd(&q[(i*ldq)+12]);
		q4 = _mm256_add_pd(q4, _mm256_add_pd(_mm256_mul_pd(x4,h1), _mm256_mul_pd(y4, h2)));
		_mm256_store_pd(&q[(i*ldq)+12],q4);
		q5 = _mm256_load_pd(&q[(i*ldq)+16]);
		q5 = _mm256_add_pd(q5, _mm256_add_pd(_mm256_mul_pd(x5,h1), _mm256_mul_pd(y5, h2)));
		_mm256_store_pd(&q[(i*ldq)+16],q5);
		q6 = _mm256_load_pd(&q[(i*ldq)+20]);
		q6 = _mm256_add_pd(q6, _mm256_add_pd(_mm256_mul_pd(x6,h1), _mm256_mul_pd(y6, h2)));
		_mm256_store_pd(&q[(i*ldq)+20],q6);
#endif
	}

	h1 = _mm256_broadcast_sd(&hh[nb-1]);
429
#ifdef __ELPA_USE_FMA__
430
	q1 = _mm256_load_pd(&q[nb*ldq]);
431
	q1 = _mm256_FMA_pd(x1, h1, q1);
432 433
	_mm256_store_pd(&q[nb*ldq],q1);
	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
434
	q2 = _mm256_FMA_pd(x2, h1, q2);
435 436
	_mm256_store_pd(&q[(nb*ldq)+4],q2);
	q3 = _mm256_load_pd(&q[(nb*ldq)+8]);
437
	q3 = _mm256_FMA_pd(x3, h1, q3);
438 439
	_mm256_store_pd(&q[(nb*ldq)+8],q3);
	q4 = _mm256_load_pd(&q[(nb*ldq)+12]);
440
	q4 = _mm256_FMA_pd(x4, h1, q4);
441 442
	_mm256_store_pd(&q[(nb*ldq)+12],q4);
	q5 = _mm256_load_pd(&q[(nb*ldq)+16]);
443
	q5 = _mm256_FMA_pd(x5, h1, q5);
444 445
	_mm256_store_pd(&q[(nb*ldq)+16],q5);
	q6 = _mm256_load_pd(&q[(nb*ldq)+20]);
446
	q6 = _mm256_FMA_pd(x6, h1, q6);
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	_mm256_store_pd(&q[(nb*ldq)+20],q6);
#else
	q1 = _mm256_load_pd(&q[nb*ldq]);
	q1 = _mm256_add_pd(q1, _mm256_mul_pd(x1, h1));
	_mm256_store_pd(&q[nb*ldq],q1);
	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
	q2 = _mm256_add_pd(q2, _mm256_mul_pd(x2, h1));
	_mm256_store_pd(&q[(nb*ldq)+4],q2);
	q3 = _mm256_load_pd(&q[(nb*ldq)+8]);
	q3 = _mm256_add_pd(q3, _mm256_mul_pd(x3, h1));
	_mm256_store_pd(&q[(nb*ldq)+8],q3);
	q4 = _mm256_load_pd(&q[(nb*ldq)+12]);
	q4 = _mm256_add_pd(q4, _mm256_mul_pd(x4, h1));
	_mm256_store_pd(&q[(nb*ldq)+12],q4);
	q5 = _mm256_load_pd(&q[(nb*ldq)+16]);
	q5 = _mm256_add_pd(q5, _mm256_mul_pd(x5, h1));
	_mm256_store_pd(&q[(nb*ldq)+16],q5);
	q6 = _mm256_load_pd(&q[(nb*ldq)+20]);
	q6 = _mm256_add_pd(q6, _mm256_mul_pd(x6, h1));
	_mm256_store_pd(&q[(nb*ldq)+20],q6);
#endif
}

/**
 * Unrolled kernel that computes
 * 16 rows of Q simultaneously, a
 * matrix vector product with two householder
 * vectors + a rank 2 update is performed
 */
 __forceinline void hh_trafo_kernel_16_AVX_2hv(double* q, double* hh, int nb, int ldq, int ldh, double s)
{
	/////////////////////////////////////////////////////
	// Matrix Vector Multiplication, Q [16 x nb+1] * hh
	// hh contains two householder vectors, with offset 1
	/////////////////////////////////////////////////////
	int i;
	// Needed bit mask for floating point sign flip
	__m256d sign = (__m256d)_mm256_set1_epi64x(0x8000000000000000);

	__m256d x1 = _mm256_load_pd(&q[ldq]);
	__m256d x2 = _mm256_load_pd(&q[ldq+4]);
	__m256d x3 = _mm256_load_pd(&q[ldq+8]);
	__m256d x4 = _mm256_load_pd(&q[ldq+12]);

	__m256d h1 = _mm256_broadcast_sd(&hh[ldh+1]);
	__m256d h2;

494
#ifdef __ELPA_USE_FMA__
495
	__m256d q1 = _mm256_load_pd(q);
496
	__m256d y1 = _mm256_FMA_pd(x1, h1, q1);
497
	__m256d q2 = _mm256_load_pd(&q[4]);
498
	__m256d y2 = _mm256_FMA_pd(x2, h1, q2);
499
	__m256d q3 = _mm256_load_pd(&q[8]);
500
	__m256d y3 = _mm256_FMA_pd(x3, h1, q3);
501
	__m256d q4 = _mm256_load_pd(&q[12]);
502
	__m256d y4 = _mm256_FMA_pd(x4, h1, q4);
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#else
	__m256d q1 = _mm256_load_pd(q);
	__m256d y1 = _mm256_add_pd(q1, _mm256_mul_pd(x1, h1));
	__m256d q2 = _mm256_load_pd(&q[4]);
	__m256d y2 = _mm256_add_pd(q2, _mm256_mul_pd(x2, h1));
	__m256d q3 = _mm256_load_pd(&q[8]);
	__m256d y3 = _mm256_add_pd(q3, _mm256_mul_pd(x3, h1));
	__m256d q4 = _mm256_load_pd(&q[12]);
	__m256d y4 = _mm256_add_pd(q4, _mm256_mul_pd(x4, h1));
#endif

	for(i = 2; i < nb; i++)
	{
		h1 = _mm256_broadcast_sd(&hh[i-1]);
		h2 = _mm256_broadcast_sd(&hh[ldh+i]);
518
#ifdef __ELPA_USE_FMA__
519
		q1 = _mm256_load_pd(&q[i*ldq]);
520 521
		x1 = _mm256_FMA_pd(q1, h1, x1);
		y1 = _mm256_FMA_pd(q1, h2, y1);
522
		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
523 524
		x2 = _mm256_FMA_pd(q2, h1, x2);
		y2 = _mm256_FMA_pd(q2, h2, y2);
525
		q3 = _mm256_load_pd(&q[(i*ldq)+8]);
526 527
		x3 = _mm256_FMA_pd(q3, h1, x3);
		y3 = _mm256_FMA_pd(q3, h2, y3);
528
		q4 = _mm256_load_pd(&q[(i*ldq)+12]);
529 530
		x4 = _mm256_FMA_pd(q4, h1, x4);
		y4 = _mm256_FMA_pd(q4, h2, y4);
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#else
		q1 = _mm256_load_pd(&q[i*ldq]);
		x1 = _mm256_add_pd(x1, _mm256_mul_pd(q1,h1));
		y1 = _mm256_add_pd(y1, _mm256_mul_pd(q1,h2));
		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
		x2 = _mm256_add_pd(x2, _mm256_mul_pd(q2,h1));
		y2 = _mm256_add_pd(y2, _mm256_mul_pd(q2,h2));
		q3 = _mm256_load_pd(&q[(i*ldq)+8]);
		x3 = _mm256_add_pd(x3, _mm256_mul_pd(q3,h1));
		y3 = _mm256_add_pd(y3, _mm256_mul_pd(q3,h2));
		q4 = _mm256_load_pd(&q[(i*ldq)+12]);
		x4 = _mm256_add_pd(x4, _mm256_mul_pd(q4,h1));
		y4 = _mm256_add_pd(y4, _mm256_mul_pd(q4,h2));
#endif
	}

	h1 = _mm256_broadcast_sd(&hh[nb-1]);
548
#ifdef __ELPA_USE_FMA__
549
	q1 = _mm256_load_pd(&q[nb*ldq]);
550
	x1 = _mm256_FMA_pd(q1, h1, x1);
551
	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
552
	x2 = _mm256_FMA_pd(q2, h1, x2);
553
	q3 = _mm256_load_pd(&q[(nb*ldq)+8]);
554
	x3 = _mm256_FMA_pd(q3, h1, x3);
555
	q4 = _mm256_load_pd(&q[(nb*ldq)+12]);
556
	x4 = _mm256_FMA_pd(q4, h1, x4);
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#else
	q1 = _mm256_load_pd(&q[nb*ldq]);
	x1 = _mm256_add_pd(x1, _mm256_mul_pd(q1,h1));
	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
	x2 = _mm256_add_pd(x2, _mm256_mul_pd(q2,h1));
	q3 = _mm256_load_pd(&q[(nb*ldq)+8]);
	x3 = _mm256_add_pd(x3, _mm256_mul_pd(q3,h1));
	q4 = _mm256_load_pd(&q[(nb*ldq)+12]);
	x4 = _mm256_add_pd(x4, _mm256_mul_pd(q4,h1));
#endif

	/////////////////////////////////////////////////////
	// Rank-2 update of Q [16 x nb+1]
	/////////////////////////////////////////////////////

	__m256d tau1 = _mm256_broadcast_sd(hh);
	__m256d tau2 = _mm256_broadcast_sd(&hh[ldh]);
	__m256d vs = _mm256_broadcast_sd(&s);

	h1 = _mm256_xor_pd(tau1, sign);
	x1 = _mm256_mul_pd(x1, h1);
	x2 = _mm256_mul_pd(x2, h1);
	x3 = _mm256_mul_pd(x3, h1);
	x4 = _mm256_mul_pd(x4, h1);
	h1 = _mm256_xor_pd(tau2, sign);
	h2 = _mm256_mul_pd(h1, vs);
583 584 585 586 587
#ifdef __ELPA_USE_FMA__
	y1 = _mm256_FMA_pd(y1, h1, _mm256_mul_pd(x1,h2));
	y2 = _mm256_FMA_pd(y2, h1, _mm256_mul_pd(x2,h2));
	y3 = _mm256_FMA_pd(y3, h1, _mm256_mul_pd(x3,h2));
	y4 = _mm256_FMA_pd(y4, h1, _mm256_mul_pd(x4,h2));
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#else
	y1 = _mm256_add_pd(_mm256_mul_pd(y1,h1), _mm256_mul_pd(x1,h2));
	y2 = _mm256_add_pd(_mm256_mul_pd(y2,h1), _mm256_mul_pd(x2,h2));
	y3 = _mm256_add_pd(_mm256_mul_pd(y3,h1), _mm256_mul_pd(x3,h2));
	y4 = _mm256_add_pd(_mm256_mul_pd(y4,h1), _mm256_mul_pd(x4,h2));
#endif

	q1 = _mm256_load_pd(q);
	q1 = _mm256_add_pd(q1, y1);
	_mm256_store_pd(q,q1);
	q2 = _mm256_load_pd(&q[4]);
	q2 = _mm256_add_pd(q2, y2);
	_mm256_store_pd(&q[4],q2);
	q3 = _mm256_load_pd(&q[8]);
	q3 = _mm256_add_pd(q3, y3);
	_mm256_store_pd(&q[8],q3);
	q4 = _mm256_load_pd(&q[12]);
	q4 = _mm256_add_pd(q4, y4);
	_mm256_store_pd(&q[12],q4);

	h2 = _mm256_broadcast_sd(&hh[ldh+1]);
609
#ifdef __ELPA_USE_FMA__
610
	q1 = _mm256_load_pd(&q[ldq]);
611
	q1 = _mm256_add_pd(q1, _mm256_FMA_pd(y1, h2, x1));
612 613
	_mm256_store_pd(&q[ldq],q1);
	q2 = _mm256_load_pd(&q[ldq+4]);
614
	q2 = _mm256_add_pd(q2, _mm256_FMA_pd(y2, h2, x2));
615 616
	_mm256_store_pd(&q[ldq+4],q2);
	q3 = _mm256_load_pd(&q[ldq+8]);
617
	q3 = _mm256_add_pd(q3, _mm256_FMA_pd(y3, h2, x3));
618 619
	_mm256_store_pd(&q[ldq+8],q3);
	q4 = _mm256_load_pd(&q[ldq+12]);
620
	q4 = _mm256_add_pd(q4, _mm256_FMA_pd(y4, h2, x4));
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	_mm256_store_pd(&q[ldq+12],q4);
#else
	q1 = _mm256_load_pd(&q[ldq]);
	q1 = _mm256_add_pd(q1, _mm256_add_pd(x1, _mm256_mul_pd(y1, h2)));
	_mm256_store_pd(&q[ldq],q1);
	q2 = _mm256_load_pd(&q[ldq+4]);
	q2 = _mm256_add_pd(q2, _mm256_add_pd(x2, _mm256_mul_pd(y2, h2)));
	_mm256_store_pd(&q[ldq+4],q2);
	q3 = _mm256_load_pd(&q[ldq+8]);
	q3 = _mm256_add_pd(q3, _mm256_add_pd(x3, _mm256_mul_pd(y3, h2)));
	_mm256_store_pd(&q[ldq+8],q3);
	q4 = _mm256_load_pd(&q[ldq+12]);
	q4 = _mm256_add_pd(q4, _mm256_add_pd(x4, _mm256_mul_pd(y4, h2)));
	_mm256_store_pd(&q[ldq+12],q4);
#endif

	for (i = 2; i < nb; i++)
	{
		h1 = _mm256_broadcast_sd(&hh[i-1]);
		h2 = _mm256_broadcast_sd(&hh[ldh+i]);
641
#ifdef __ELPA_USE_FMA__
642
		q1 = _mm256_load_pd(&q[i*ldq]);
643 644
		q1 = _mm256_FMA_pd(x1, h1, q1);
		q1 = _mm256_FMA_pd(y1, h2, q1);
645 646
		_mm256_store_pd(&q[i*ldq],q1);
		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
647 648
		q2 = _mm256_FMA_pd(x2, h1, q2);
		q2 = _mm256_FMA_pd(y2, h2, q2);
649 650
		_mm256_store_pd(&q[(i*ldq)+4],q2);
		q3 = _mm256_load_pd(&q[(i*ldq)+8]);
651 652
		q3 = _mm256_FMA_pd(x3, h1, q3);
		q3 = _mm256_FMA_pd(y3, h2, q3);
653 654
		_mm256_store_pd(&q[(i*ldq)+8],q3);
		q4 = _mm256_load_pd(&q[(i*ldq)+12]);
655 656
		q4 = _mm256_FMA_pd(x4, h1, q4);
		q4 = _mm256_FMA_pd(y4, h2, q4);
657 658 659 660 661 662 663 664 665 666 667 668 669 670 671 672 673 674
		_mm256_store_pd(&q[(i*ldq)+12],q4);
#else
		q1 = _mm256_load_pd(&q[i*ldq]);
		q1 = _mm256_add_pd(q1, _mm256_add_pd(_mm256_mul_pd(x1,h1), _mm256_mul_pd(y1, h2)));
		_mm256_store_pd(&q[i*ldq],q1);
		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
		q2 = _mm256_add_pd(q2, _mm256_add_pd(_mm256_mul_pd(x2,h1), _mm256_mul_pd(y2, h2)));
		_mm256_store_pd(&q[(i*ldq)+4],q2);
		q3 = _mm256_load_pd(&q[(i*ldq)+8]);
		q3 = _mm256_add_pd(q3, _mm256_add_pd(_mm256_mul_pd(x3,h1), _mm256_mul_pd(y3, h2)));
		_mm256_store_pd(&q[(i*ldq)+8],q3);
		q4 = _mm256_load_pd(&q[(i*ldq)+12]);
		q4 = _mm256_add_pd(q4, _mm256_add_pd(_mm256_mul_pd(x4,h1), _mm256_mul_pd(y4, h2)));
		_mm256_store_pd(&q[(i*ldq)+12],q4);
#endif
	}

	h1 = _mm256_broadcast_sd(&hh[nb-1]);
675
#ifdef __ELPA_USE_FMA__
676
	q1 = _mm256_load_pd(&q[nb*ldq]);
677
	q1 = _mm256_FMA_pd(x1, h1, q1);
678 679
	_mm256_store_pd(&q[nb*ldq],q1);
	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
680
	q2 = _mm256_FMA_pd(x2, h1, q2);
681 682
	_mm256_store_pd(&q[(nb*ldq)+4],q2);
	q3 = _mm256_load_pd(&q[(nb*ldq)+8]);
683
	q3 = _mm256_FMA_pd(x3, h1, q3);
684 685
	_mm256_store_pd(&q[(nb*ldq)+8],q3);
	q4 = _mm256_load_pd(&q[(nb*ldq)+12]);
686
	q4 = _mm256_FMA_pd(x4, h1, q4);
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	_mm256_store_pd(&q[(nb*ldq)+12],q4);
#else
	q1 = _mm256_load_pd(&q[nb*ldq]);
	q1 = _mm256_add_pd(q1, _mm256_mul_pd(x1, h1));
	_mm256_store_pd(&q[nb*ldq],q1);
	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
	q2 = _mm256_add_pd(q2, _mm256_mul_pd(x2, h1));
	_mm256_store_pd(&q[(nb*ldq)+4],q2);
	q3 = _mm256_load_pd(&q[(nb*ldq)+8]);
	q3 = _mm256_add_pd(q3, _mm256_mul_pd(x3, h1));
	_mm256_store_pd(&q[(nb*ldq)+8],q3);
	q4 = _mm256_load_pd(&q[(nb*ldq)+12]);
	q4 = _mm256_add_pd(q4, _mm256_mul_pd(x4, h1));
	_mm256_store_pd(&q[(nb*ldq)+12],q4);
#endif
}

/**
 * Unrolled kernel that computes
 * 8 rows of Q simultaneously, a
 * matrix vector product with two householder
 * vectors + a rank 2 update is performed
 */
 __forceinline void hh_trafo_kernel_8_AVX_2hv(double* q, double* hh, int nb, int ldq, int ldh, double s)
{
	/////////////////////////////////////////////////////
	// Matrix Vector Multiplication, Q [8 x nb+1] * hh
	// hh contains two householder vectors, with offset 1
	/////////////////////////////////////////////////////
	int i;
	// Needed bit mask for floating point sign flip
	__m256d sign = (__m256d)_mm256_set1_epi64x(0x8000000000000000);

	__m256d x1 = _mm256_load_pd(&q[ldq]);
	__m256d x2 = _mm256_load_pd(&q[ldq+4]);

	__m256d h1 = _mm256_broadcast_sd(&hh[ldh+1]);
	__m256d h2;

726
#ifdef __ELPA_USE_FMA__
727
	__m256d q1 = _mm256_load_pd(q);
728
	__m256d y1 = _mm256_FMA_pd(x1, h1, q1);
729
	__m256d q2 = _mm256_load_pd(&q[4]);
730
	__m256d y2 = _mm256_FMA_pd(x2, h1, q2);
731 732 733 734 735 736 737 738 739 740 741
#else
	__m256d q1 = _mm256_load_pd(q);
	__m256d y1 = _mm256_add_pd(q1, _mm256_mul_pd(x1, h1));
	__m256d q2 = _mm256_load_pd(&q[4]);
	__m256d y2 = _mm256_add_pd(q2, _mm256_mul_pd(x2, h1));
#endif

	for(i = 2; i < nb; i++)
	{
		h1 = _mm256_broadcast_sd(&hh[i-1]);
		h2 = _mm256_broadcast_sd(&hh[ldh+i]);
742
#ifdef __ELPA_USE_FMA__
743
		q1 = _mm256_load_pd(&q[i*ldq]);
744 745
		x1 = _mm256_FMA_pd(q1, h1, x1);
		y1 = _mm256_FMA_pd(q1, h2, y1);
746
		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
747 748
		x2 = _mm256_FMA_pd(q2, h1, x2);
		y2 = _mm256_FMA_pd(q2, h2, y2);
749 750 751 752 753 754 755 756 757 758 759
#else
		q1 = _mm256_load_pd(&q[i*ldq]);
		x1 = _mm256_add_pd(x1, _mm256_mul_pd(q1,h1));
		y1 = _mm256_add_pd(y1, _mm256_mul_pd(q1,h2));
		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
		x2 = _mm256_add_pd(x2, _mm256_mul_pd(q2,h1));
		y2 = _mm256_add_pd(y2, _mm256_mul_pd(q2,h2));
#endif
	}

	h1 = _mm256_broadcast_sd(&hh[nb-1]);
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#ifdef __ELPA_USE_FMA__
761
	q1 = _mm256_load_pd(&q[nb*ldq]);
762
	x1 = _mm256_FMA_pd(q1, h1, x1);
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	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
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	x2 = _mm256_FMA_pd(q2, h1, x2);
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#else
	q1 = _mm256_load_pd(&q[nb*ldq]);
	x1 = _mm256_add_pd(x1, _mm256_mul_pd(q1,h1));
	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
	x2 = _mm256_add_pd(x2, _mm256_mul_pd(q2,h1));
#endif

	/////////////////////////////////////////////////////
	// Rank-2 update of Q [8 x nb+1]
	/////////////////////////////////////////////////////

	__m256d tau1 = _mm256_broadcast_sd(hh);
	__m256d tau2 = _mm256_broadcast_sd(&hh[ldh]);
	__m256d vs = _mm256_broadcast_sd(&s);

	h1 = _mm256_xor_pd(tau1, sign);
	x1 = _mm256_mul_pd(x1, h1);
	x2 = _mm256_mul_pd(x2, h1);
	h1 = _mm256_xor_pd(tau2, sign);
	h2 = _mm256_mul_pd(h1, vs);
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#ifdef __ELPA_USE_FMA__
	y1 = _mm256_FMA_pd(y1, h1, _mm256_mul_pd(x1,h2));
	y2 = _mm256_FMA_pd(y2, h1, _mm256_mul_pd(x2,h2));
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#else
	y1 = _mm256_add_pd(_mm256_mul_pd(y1,h1), _mm256_mul_pd(x1,h2));
	y2 = _mm256_add_pd(_mm256_mul_pd(y2,h1), _mm256_mul_pd(x2,h2));
#endif

	q1 = _mm256_load_pd(q);
	q1 = _mm256_add_pd(q1, y1);
	_mm256_store_pd(q,q1);
	q2 = _mm256_load_pd(&q[4]);
	q2 = _mm256_add_pd(q2, y2);
	_mm256_store_pd(&q[4],q2);

	h2 = _mm256_broadcast_sd(&hh[ldh+1]);
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#ifdef __ELPA_USE_FMA__
802
	q1 = _mm256_load_pd(&q[ldq]);
803
	q1 = _mm256_add_pd(q1, _mm256_FMA_pd(y1, h2, x1));
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	_mm256_store_pd(&q[ldq],q1);
	q2 = _mm256_load_pd(&q[ldq+4]);
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	q2 = _mm256_add_pd(q2, _mm256_FMA_pd(y2, h2, x2));
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	_mm256_store_pd(&q[ldq+4],q2);
#else
	q1 = _mm256_load_pd(&q[ldq]);
	q1 = _mm256_add_pd(q1, _mm256_add_pd(x1, _mm256_mul_pd(y1, h2)));
	_mm256_store_pd(&q[ldq],q1);
	q2 = _mm256_load_pd(&q[ldq+4]);
	q2 = _mm256_add_pd(q2, _mm256_add_pd(x2, _mm256_mul_pd(y2, h2)));
	_mm256_store_pd(&q[ldq+4],q2);
#endif

	for (i = 2; i < nb; i++)
	{
		h1 = _mm256_broadcast_sd(&hh[i-1]);
		h2 = _mm256_broadcast_sd(&hh[ldh+i]);
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#ifdef __ELPA_USE_FMA__
822
		q1 = _mm256_load_pd(&q[i*ldq]);
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		q1 = _mm256_FMA_pd(x1, h1, q1);
		q1 = _mm256_FMA_pd(y1, h2, q1);
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		_mm256_store_pd(&q[i*ldq],q1);
		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
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		q2 = _mm256_FMA_pd(x2, h1, q2);
		q2 = _mm256_FMA_pd(y2, h2, q2);
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		_mm256_store_pd(&q[(i*ldq)+4],q2);
#else
		q1 = _mm256_load_pd(&q[i*ldq]);
		q1 = _mm256_add_pd(q1, _mm256_add_pd(_mm256_mul_pd(x1,h1), _mm256_mul_pd(y1, h2)));
		_mm256_store_pd(&q[i*ldq],q1);
		q2 = _mm256_load_pd(&q[(i*ldq)+4]);
		q2 = _mm256_add_pd(q2, _mm256_add_pd(_mm256_mul_pd(x2,h1), _mm256_mul_pd(y2, h2)));
		_mm256_store_pd(&q[(i*ldq)+4],q2);
#endif
	}

	h1 = _mm256_broadcast_sd(&hh[nb-1]);
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#ifdef __ELPA_USE_FMA__
842
	q1 = _mm256_load_pd(&q[nb*ldq]);
843
	q1 = _mm256_FMA_pd(x1, h1, q1);
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	_mm256_store_pd(&q[nb*ldq],q1);
	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
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	q2 = _mm256_FMA_pd(x2, h1, q2);
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	_mm256_store_pd(&q[(nb*ldq)+4],q2);
#else
	q1 = _mm256_load_pd(&q[nb*ldq]);
	q1 = _mm256_add_pd(q1, _mm256_mul_pd(x1, h1));
	_mm256_store_pd(&q[nb*ldq],q1);
	q2 = _mm256_load_pd(&q[(nb*ldq)+4]);
	q2 = _mm256_add_pd(q2, _mm256_mul_pd(x2, h1));
	_mm256_store_pd(&q[(nb*ldq)+4],q2);
#endif
}

/**
 * Unrolled kernel that computes
 * 4 rows of Q simultaneously, a
 * matrix vector product with two householder
 * vectors + a rank 2 update is performed
 */
 __forceinline void hh_trafo_kernel_4_AVX_2hv(double* q, double* hh, int nb, int ldq, int ldh, double s)
{
	/////////////////////////////////////////////////////
	// Matrix Vector Multiplication, Q [4 x nb+1] * hh
	// hh contains two householder vectors, with offset 1
	/////////////////////////////////////////////////////
	int i;
	// Needed bit mask for floating point sign flip
	__m256d sign = (__m256d)_mm256_set1_epi64x(0x8000000000000000);

	__m256d x1 = _mm256_load_pd(&q[ldq]);

	__m256d h1 = _mm256_broadcast_sd(&hh[ldh+1]);
	__m256d h2;

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#ifdef __ELPA_USE_FMA__
880
	__m256d q1 = _mm256_load_pd(q);
881
	__m256d y1 = _mm256_FMA_pd(x1, h1, q1);
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#else
	__m256d q1 = _mm256_load_pd(q);
	__m256d y1 = _mm256_add_pd(q1, _mm256_mul_pd(x1, h1));
#endif

	for(i = 2; i < nb; i++)
	{
		h1 = _mm256_broadcast_sd(&hh[i-1]);
		h2 = _mm256_broadcast_sd(&hh[ldh+i]);
891
#ifdef __ELPA_USE_FMA__
892
		q1 = _mm256_load_pd(&q[i*ldq]);
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		x1 = _mm256_FMA_pd(q1, h1, x1);
		y1 = _mm256_FMA_pd(q1, h2, y1);
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#else
		q1 = _mm256_load_pd(&q[i*ldq]);
		x1 = _mm256_add_pd(x1, _mm256_mul_pd(q1,h1));
		y1 = _mm256_add_pd(y1, _mm256_mul_pd(q1,h2));
#endif
	}

	h1 = _mm256_broadcast_sd(&hh[nb-1]);
903
#ifdef __ELPA_USE_FMA__
904
	q1 = _mm256_load_pd(&q[nb*ldq]);
905
	x1 = _mm256_FMA_pd(q1, h1, x1);
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#else
	q1 = _mm256_load_pd(&q[nb*ldq]);
	x1 = _mm256_add_pd(x1, _mm256_mul_pd(q1,h1));
#endif

	/////////////////////////////////////////////////////
	// Rank-2 update of Q [4 x nb+1]
	/////////////////////////////////////////////////////

	__m256d tau1 = _mm256_broadcast_sd(hh);
	__m256d tau2 = _mm256_broadcast_sd(&hh[ldh]);
	__m256d vs = _mm256_broadcast_sd(&s);

	h1 = _mm256_xor_pd(tau1, sign);
	x1 = _mm256_mul_pd(x1, h1);
	h1 = _mm256_xor_pd(tau2, sign);
	h2 = _mm256_mul_pd(h1, vs);
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#ifdef __ELPA_USE_FMA__
	y1 = _mm256_FMA_pd(y1, h1, _mm256_mul_pd(x1,h2));
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#else
	y1 = _mm256_add_pd(_mm256_mul_pd(y1,h1), _mm256_mul_pd(x1,h2));
#endif

	q1 = _mm256_load_pd(q);
	q1 = _mm256_add_pd(q1, y1);
	_mm256_store_pd(q,q1);

	h2 = _mm256_broadcast_sd(&hh[ldh+1]);
934
#ifdef __ELPA_USE_FMA__
935
	q1 = _mm256_load_pd(&q[ldq]);
936
	q1 = _mm256_add_pd(q1, _mm256_FMA_pd(y1, h2, x1));
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	_mm256_store_pd(&q[ldq],q1);
#else
	q1 = _mm256_load_pd(&q[ldq]);
	q1 = _mm256_add_pd(q1, _mm256_add_pd(x1, _mm256_mul_pd(y1, h2)));
	_mm256_store_pd(&q[ldq],q1);
#endif

	for (i = 2; i < nb; i++)
	{
		h1 = _mm256_broadcast_sd(&hh[i-1]);
		h2 = _mm256_broadcast_sd(&hh[ldh+i]);
948
#ifdef __ELPA_USE_FMA__
949
		q1 = _mm256_load_pd(&q[i*ldq]);
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		q1 = _mm256_FMA_pd(x1, h1, q1);
		q1 = _mm256_FMA_pd(y1, h2, q1);
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		_mm256_store_pd(&q[i*ldq],q1);
#else
		q1 = _mm256_load_pd(&q[i*ldq]);
		q1 = _mm256_add_pd(q1, _mm256_add_pd(_mm256_mul_pd(x1,h1), _mm256_mul_pd(y1, h2)));
		_mm256_store_pd(&q[i*ldq],q1);
#endif
	}

	h1 = _mm256_broadcast_sd(&hh[nb-1]);
961
#ifdef __ELPA_USE_FMA__
962
	q1 = _mm256_load_pd(&q[nb*ldq]);
963
	q1 = _mm256_FMA_pd(x1, h1, q1);
964 965 966 967 968 969 970 971
	_mm256_store_pd(&q[nb*ldq],q1);
#else
	q1 = _mm256_load_pd(&q[nb*ldq]);
	q1 = _mm256_add_pd(q1, _mm256_mul_pd(x1, h1));
	_mm256_store_pd(&q[nb*ldq],q1);
#endif
}